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WEC T20 / T30 BSP Release

 

The following table contains known issues, scheduled bug fixes, and feature improvements for the Tegra Windows CE BSPs and images.

Any schedules are not guaranteed, but reflect the current planning. The planning could be shifted due to priority changes.
Issues which are scheduled for a specific version (e.g. V1.3beta1) will be integrated in the mentioned version of the BSP.

We will update this table continuously in order to always provide the latest state of our development plan.

Odd beta versions, as 1.0b1 or 1.3b3, are internal releases only for testing. They are omitted from the table.

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Issue #StatusSubjectModuleSubsystemWinCE OS

Not Planned
WC-2168Feature RequestBCT Memory Optimisation Phase 2Apalis T30Bootloader, RAM

Description: Currently DDR3L RAM is running at a fixed 800MHz frequency. Further optimisations to allow for automatic frequency switching in order to save power and decrease dissipated heat are required.

Workaround: You may use the previous fixed 533MHz BCT still shipping in our latest BSP demo image packages as well (see apalis-t30_bin/apalis_t30_12MHz_MT41K512M8RH-125_533MHz.bct).