Heterogeneous Multi-core Processing (HMP) Documentation Overview

Heterogeneous Multi-core Processing Overview

This article provides a definition of Heterogeneous Multi-core Processing, a glossary and a high-level process to get started using it in your development.

HMP on NXP i.MX

Find out more information about the HMP development on NXP i.MX.

HMP on TI AMxx

Find out more information about the HMP development on TI AMxx.

HMP and Memory Areas on Toradex SoMs

The objective of this article is to provide an overview of Toradex SoMs that feature cores with different architectures, such as the NXP/Freescale i.MX 7 and i.MX 8/8X/8MM/8MP based platforms. Here, you will find general information about the hardware, the HMP cores and memory areas.