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WEC T20 / T30 BSP Release

 

The following table contains known issues, scheduled bug fixes, and feature improvements for the Tegra Windows CE BSPs and images.

Any schedules are not guaranteed, but reflect the current planning. The planning could be shifted due to priority changes.
Issues which are scheduled for a specific version (e.g. V1.3beta1) will be integrated in the mentioned version of the BSP.

We will update this table continuously in order to always provide the latest state of our development plan.

Odd beta versions, as 1.0b1 or 1.3b3, are internal releases only for testing. They are omitted from the table.

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Issue #StatusSubjectModuleSubsystemWinCE OS

V2.0beta1 (Release date: 2016-05-17)
- WinCE 6 Updates: Installed Microsoft CE6 Updates until 2016M03
- WEC 7 Updates: Installed Microsoft CE7 Updates until 2016M03
- WEC 2013 Updates: Installed Updates until 2016M03
To Upgrade to 2.0 beta 1 use the new UpdateTool (https://docs.toradex.com/103231-tegra-update-tool.zip). Select the Layout Config file for your target OS.
WC-2145New FeatureFurther reduce Pixel clock jitterColibri T20, Colibri T30, Apalis T30GraphicsCE6, WEC7, WEC2013

Description: Some displays pixel clock with a higher accuracy. By default the display drivers uses the most efficient clock source. In issue 9528 we have introduced a registry key registry key forcePLLD in [HKLM\Software\Nvidia Corporation\NVDDI\LCD] that allows you to optimize in accuracy. We further optimized the accuracy of the clock in case you are using the forcePLLD key.