 HAR-4397 | Fixed | Dropping Support of HiFi 4 DSP Feature |
Description: The HiFi 4 DSP feature will be no longer supported on the future versions of this product. Please don't use this feature on any current product version which theoretically would support it. Workaround: None |
| HAR-4979 | Fixed | Instability Issue (flickering) on the i.MX8 QXP and i.MX8 DXP LVDS Interface |
Description: On 20.07.2020 we were informed about an LVDS instability issue (flickering) on new version of NXP i.MX 8QuadXPlus/i.MX 8DualXPlus which are used in our prototype Apalis iMX8X products until version 1.1A. The LVDS display interface clock might not run stable depending on temperature and voltage applied. Workaround: We are working with NXP to get screened processors that do not manifest this issue. This issue will be fixed in the next product version. |
| HAR-4303 | Fixed | Inaccurate ADC reading on Apalis iMX8X Module |
Description: The ADC input sampling time can be set between 3 and 131 clocks (of the 24MHz used).
According to the ADC datasheet, at the longest sampling time of 131 clocks, the source output resistance must not be higher than 5kOhm. The resistor value assembled on the affected product version was 10kOhm.
This leads to the sampling capacitor not being fully charged to the input voltage and thus inaccurate ADC conversion results.
In the fixed product versions, the series resistors value has been changed to 1kOhm. Workaround: None. |
| HAR-6336 | Fixed | RX and TX signals swapped for Bluetooth audio I2S interface |
Description: The RX and TX signals of the I2S audio interface between the i.MX 8M Plus SoC and the Wi-Fi module are swapped. Workaround: There is no workaround for making the Bluetooth audio feature of the Wi-Fi module available. |
| HAR-6503 | Fixed | Automatic role switching doesn’t work on the USB 2.0 OTG interface |
Description: NXP has renamed the USB1_ID pin to USB1_DNU (do not use). With that, they have removed the USB ID function from this pin. The USB ID signal is intended to be used for the USB OTG receptacle to distinguish whether a type A (module act as a USB client) or type B (module act as a USB host) cable is plugged in. On the Verdin iMX8M Plus, the SoC pin USB1_ID is available on the module edge connector pin 161 as USB_1_ID. It is intended to be used as the USB ID for a USB OTG implementation on the carrier board. Unfortunately, the SoC pin USB1_ID does not serve any GPIO functionality. With the degradation to USB1_DNU, the pin cannot be used anymore. Without the USB_1_ID signal, the USB OTG port can only be set permanently to host or client mode by changing the device tree settings. Workaround: In the device tree, it is possible to set the USB_1 port permanently to host mode. By default, the port is set to client mode. If the dynamic role switching between host and client modes is required, any free GPIO can be used. This solution requires further changes in the device tree. Please note that this breaks compatibility with other modules in the Verdin family. In case of custom carrier boards employing this workaround, it is highly recommended to add an assembly option for using the Verdin standard pin 161 as USB ID for keeping compatibility with other Verdin modules. |
| HAR-6498 | Fixed | MIPI CSI camera optional master clock output not usable |
Description: The Verdin pinout contains an optional master clock output for the CSI_1 interface. The SAI3_MCLK SoC pin is used for providing the optional Verdin camera interface master clock CSI_1_MCLK output. This signal is available on the module edge connector pin 91. The SoC pin can provide clock signals from the SAI3 and SAI5 audio interfaces. Therefore, a dummy audio driver with a dummy audio stream would be required for enabling the clock output. The current Toradex BSP does not support the CSI_1_MCLK option. Workaround: Instead of using the CSI_1_MCLK, use an external crystal or oscillator for the camera. The i.MX 8M Plus SoC features two general-purpose clock outputs that can be used independently from the audio interfaces. Those clock signals are only available as alternate functions of other signal pins. Therefore, the clock signals are not compatible with other Verdin modules. If one of the general purposes clock outputs are used, adding an assembly option for using the
CSI_1_MCLK pin is highly recommended. This ensures compatibility with existing and future
versions of the Verdin iMX8M Plus and other Verdin modules. |
| Verdin iMX8M Plus V1.0D |
| HAR-8444 | Fixed | Operating temperature range limitation |
Description: The 0058 Verdin iMX8M Plus Quad 4GB WB IT V1.0C is a special development version that features a Consumer temperature range SoC part. As a consequence, the product version does not support the full industrial temperature range and is only usable between 0°C and +70°C. Workaround: There is no workaround to this limitation. If full industrial temperature range support is required, consider using the 0058 Verdin iMX8M Plus Quad 4GB WB IT V1.0D instead. |
| Verdin iMX8M Plus V1.0C |
| HAR-8341 | Fixed | Stitching Capacitor Influences Bluetooth Config Strapping |
Description: The signal used for strapping the HCI (Host Controller Interface) configuration of the Bluetooth solution at the time of powering up the SoM is also available on the Module-specific pin MSP_8 (#104) of the SoM edge connector. Module-specific pins feature stitching capacitors for providing current return paths for cases when those pins are being used for accommodating high-speed signals. The Verdin iMX8M Plus V1.0B configurations equipped with a Wi-Fi/Bluetooth solution feature one such capacitor (C210) on the MSP_8 signal. During powering up the system, the stitching capacitor is delaying the transition of the related signal to the intended state and thus results in a wrong configuration being strapped. Instead of SDIO mode, the host interface of the Bluetooth solution gets configured to UART mode. As a result, the Bluetooth solution is not accessible by the system. Workaround: Remove the stitching capacitor C210 from the SoM. This makes the Bluetooth interface work in case the SoM is connected to a Dahlia V1.1A carrier board. If the SoM is connected to a Verdin Development Board V1.1A, then other stitching capacitors need to be removed from the carrier board as well. For more information, please refer to HAR-8342 in the Verdin Development Board errata. The issue will be resolved in future HW versions of these products. |
| Verdin iMX8M Mini V1.1B |
| HAR-7203 | Fixed | Double termination on the PCIe clock lines of the Verdin iMX8M Mini |
Description: The PCIe reference clock available at the module edge connector pins 226 and 228 is generated by the i.MX 8M Mini SoC. The clock signals are unintentionally terminated twice. There are 49.9Ω termination resistors on the module, and the SoC pins have internal terminations as well. This double termination adds too much load on the reference clock, leading to a wrong output level. The V1.0B versions of the Verdin iMX8M Mini modules are not affected by this issue since those feature an external PCIe clock source that requires the external termination resistors. Workaround: Remove the two 49.9Ω termination resistors R28 and R29 on the Verdin iMX8M Mini module. The resistors are located on the top side of the module. For more information, please consult Errata #14 in the Verdin iMX8M Mini errata document. |
| Verdin Development Board V1.1C |
| HAR-8833 | Fixed | The carrier board turns off or resets when a cable is connected to the USB-C FTDI debug connector |
Description: Due to a race condition between the pull-up voltage at the gates of the transistor level shifters, the DBG_PWR_BTN#, DBG_FORCE_OFF#, DBG_RESET#, DBG_RECOVERY#, and the FTDI_JTAG_TRST# signals can get unintentionally triggered when connecting a cable to the USB-C connector of the FTDI debug port. This may reset or shut down the module, or shut down the power rails of the carrier board. Workaround: Connect the cable to the USB-C connector of the FTDI debug port before powering on the carrier board. As an alternative solution, the resistors R165, R168, R172, R175, and R319 can be replaced with resistors having a resistance of 1MOhm. This slows down the transistor level shifter circuits and makes sure that the power control signals are not triggered when connecting the cable to the USB-C connector of the FTDI debug port. The same improvement is going to be implemented in future versions of the product. |
| HAR-9004 | Fixed | Overvoltage protection triggered when hot plugin Verdin Development Board V1.1A |
Description: The carrier board features a protection IC (IC25) that protects the product from various power-related error scenarios, namely: overvoltage, overcurrent, undervoltage, reverse polarity. In case a power supply providing a voltage near the high threshold of the input voltage range (26.4V) gets hot-plugged to the carrier board, ringing may form at the input of the protection device. The energy is bouncing between the low-ESR capacitors C98 and C106. This may trigger the overcurrent protection, causing the board to not power up. In this case, the protection IC's fault indication LED (LED17) is going to blink to indicate the fault condition. Workaround: Unsoldering the capacitor C98 will improve the power hot-plug capability of the product. The issue is going to be resolved in newer versions of the product. |
| HAR-8934 | Fixed | The RC element on the PCIe reset signal contributes to violating the PCIe specification |
Description: According to the PCIe specifications, software needs to wait a minimum of 100ms before sending a configuration request to a PCIe device after enabling the power and the clock.
The Verdin specification provides a dedicated reset signal for the PCIe interface (PCIE_1_RESET#). The Verdin Development Board features an RC delay circuit on this signal. This circuit consists of a 10uF capacitor and a 10kOhm pull-up resistor, resulting in a time constant of 100ms. The actual time it takes for the device to get out of the reset state is influenced by the threshold level of the device's reset input and component tolerances as well.
These factors together make the timing unpredictable. As a consequence, a PCIe device may still be in the reset state when the driver is sending the first configuration requests. The issue does not necessarily manifest in case of all potential PCIe devices, and can be temperature-dependent as well. Workaround: By eliminating the RC delay circuit from the reset signal, the module's reset timing can be fully controlled by the PCI_1_RESET# signal. For achieving that, remove the 10uF capacitor C173. The change prevents the described issue from happening. The change is going to be implemented in future versions of the product.
Alternatively, the delay between releasing the reset and initiating the configuration requests can be increased in the driver. However, this is not the preferred method as this requires modifications to be done to the standard drivers. |
| Verdin Development Board V1.1B |
| HAR-8342 | Fixed | Stitching Capacitors Influence Verdin iMX8M Plus Bluetooth Config Strapping |
Description: The signal used for strapping the HCI (Host Controller Interface) configuration of the Bluetooth solution at the time of powering up a Verdin iMX8M Plus SoM is also available on the Module-specific pin MSP_8 (#104) of the SoM edge connector. Module-specific pins feature stitching capacitors for providing current return paths for cases when those pins are being used for accommodating high-speed signals. The Verdin Development Board V1.1A features two such capacitors (C250, C313) on the MSP_8 signal. During powering up the system, the stitching capacitors are delaying the transition of the related signal to the intended state and thus result in a wrong configuration being strapped. Instead of SDIO mode, the host interface of the Bluetooth solution gets configured to UART mode. As a result, the Bluetooth solution is not accessible by the system. Workaround: Remove the stitching capacitors C250 and C313 from the carrier board. This makes the Bluetooth interface work in case the carrier board is connected to a Verdin iMX8M Plus SoM with a hardware version of V1.0C or newer. If the carrier board is connected to a Verdin iMX8M Plus V1.0B, then another stitching capacitor needs to be removed from the SoM as well. For more information, please refer to HAR-8341 in the Verdin iMX8M Plus errata. The issue will be resolved in future HW versions of these products. |
| Ixora V1.3 |
| HAR-8891 | Fixed | WAKE1_MICO# is pulled up to 3.3V instead of 3.3V_SW |
Description: The WAKE1_MICO# signal is used to wake up the Apalis SoMs from the suspend state (sleep state). This signal is served with a regular GPIO (with wake capability). The IO rail of this GPIO is turned off during the off state. Therefore, by design, it is not possible to use the WAKE1_MICO# signal for waking the SoM up from the off state (the SoM can only be woken up from the off state by asserting the RESET_MICO# signal or via a complete power cycle).
In the affected HW versions of the Ixora, the WAKE1_MICO# signal is pulled up to the 3.3V (always-on) rail. The 3.3V (always-on) rail remains on, even if the SoM is shut down (off state). As the IO rail of the GPIO pin serving the WAKE1_MICO# signal is turned off during the off state, a small backfeeding current can occur in the off state from the pull-up resistor on the carrier board into the SoM/SoC.
For the above reasons, it is recommended to pull up the WAKE1_MICO# to the 3.3V_SW (switched), which is turned off in the off state. Workaround: The 10kOhm pull-up resistor on the carrier board (R146) can be removed, if the related internal pull-up resistor of the SoC is enabled or the wake function is entirely disabled. This eliminates the potential backfeeding over the WAKE1_MICO# signal. |
| HAR-8294 | Fixed | RS232 is backfeeding |
Description: The RS232 transceiver is backfeeding to the Iris carrier board and the module. For example, in combination with the Colibri iMX6 module, a residual voltage of around 0.7V can be measured at the 3.3V rail while only the RS232 cable is plugged in. Workaround: Footprint compatible RS232 transceivers are available that do not backfeed. Replace IC4 and/or IC6 with one of the available options:
TI TRS3243EIDBR
TI MAX3243IDB
ST ST3243EBTR |
| HAR-8293 | Fixed | USB_C_DET is backfeeding |
Description: If the USB client cable is plugged in while all other power sources are removed, the voltage divider circuit (R115/R116) on the USB_C_DET signal is backfeeding the module. For example, in combination with the Colibri iMX6 module, a residual voltage of around 0.85V can be measured at the 3.3V rail. Workaround: Increase the resistor value of the divider. Change R115 to 5.6k (current value is 560R) and R116 to 10k (current value is 1k). According to tests with the Colibri iMX6, this reduces the residual voltage from 0.85V to 0.18V. |
| HAR-8292 | Fixed | USB power switching backfeeding |
Description: If only the USB client cable is plugged in while all other power sources are removed, the USB power switching IC1 gets enabled periodically. The enable input of the power switch IC is active low. If the power rails are removed, the USB_P_EN signal goes slowly down, which at one point enables the USB power switch. This unintentionally powers the board from the USB source through the 5V buck converter and turns on the 3.3V buck regulator. Since the 3.3V rail is up, the USB_P_EN signal also goes high and disables the USB power switch. This cycle repeats continuously and makes the power LEDs flashing. Workaround: Assemble the resistor R157 instead of R156. This breaks the cycle since the cycle and the buck converters remain powered down. The backfeeding protection circuit inside the USB power switch (IC1) works and disables the switch regardless of the USB_P_EN signal level. |
| HAR-8710 | Fixed | A (not-to-be-assembled) capacitor is assembled on the Iris V2.0A board |
Description: An early production lot of the Iris V2.0A is affected by an assembly issue. The capacitor C133 (Figure 1) assembled is violating a keepout zone defined for Colibri SoMs featuring an FFC connector on the bottom. These SoMs may not be properly inserted into the module connector of the affected carrier boards, potentially resulting in connection or reliability issues. Please check the related errata document for more information. Workaround: Removal of the capacitor C133 fully resolves the issue. Carrier board functionality is not impacted by the modification. C133 is not assembled on later production lots of the Iris V2.0A. |
| Iris V1.1A |
| HAR-8709 | Fixed | Abnormal RTC current consumption on some Iris V1.1A products due to a broken capacitor |
Description: The issue affects about 4% of the Iris V1.1A carrier boards shipped before the 30th of October 2015 and is caused by a broken capacitor (C55). It is possible to check the RTC circuit current consumption by measuring the voltage across a shunt resistor connected in series with the power supply used to provide 3.3V on the battery holder positive pin. The normal RTC standby supply current should be around 1uA. Workaround: Customers who received products before the 30th of October 2015 and use the RTC circuit should measure the current consumption on already received products. If an abnormal current consumption is detected, contact the Toradex RMA department to get the board fixed or replaced. Our testing process has been adjusted to find the mentioned problem and rework the affected products. |
| Dahlia Carrier Board V1.1C |
| HAR-8814 | Fixed | The carrier board turns off when a cable is connected to the USB-C FTDI debug connector |
Description: Due to a race condition between the pull-up voltage at the gates of the transistor level shifters, the DBG_PWR_BTN#, DBG_FORCE_OFF#, DBG_RESET#, DBG_RECOVERY#, and the FTDI_JTAG_TRST# signals can get unintentionally triggered when connecting a cable to the USB-C connector of the FTDI debug port. This may reset or shut down the module, or shut down the power rails of the carrier board. Workaround: Connect the cable to the USB-C connector of the FTDI debug port before powering on the carrier board. As an alternative solution, the resistors R102, R109, R115, R120, and R245 can be replaced with resistors having a resistance of 1MOhm. This slows down the transistor level shifter circuits and makes sure that the power control signals are not triggered when connecting the cable to the USB-C connector of the FTDI debug port. The same improvement is going to be implemented in future versions of the product. |
| HAR-8935 | Fixed | The RC element on the PCIe reset signal contributes to violating the PCIe specification |
Description: According to the PCIe specifications, software needs to wait a minimum of 100ms before sending a configuration request to a PCIe device after enabling the power and the clock.
The Verdin specification provides a dedicated reset signal for the PCIe interface (PCIE_1_RESET#). The Dahlia Carrier Board features an RC delay circuit on this signal. This circuit consists of a 10uF capacitor and a 10kOhm pull-up resistor, resulting in a time constant of 100ms. The actual time it takes for the device to get out of the reset state is influenced by the threshold level of the device's reset input and component tolerances as well.
These factors together make the timing unpredictable. As a consequence, a PCIe device may still be in the reset state when the driver is sending the first configuration requests. The issue does not necessarily manifest in case of all potential PCIe devices, and can be temperature-dependent as well. Workaround: By eliminating the RC delay circuit from the reset signal, the module's reset timing can be fully controlled by the PCI_1_RESET# signal. For achieving that, remove the 10uF capacitor C141. The change prevents the described issue from happening. The change is going to be implemented in future versions of the product.
Alternatively, the delay between releasing the reset and initiating the configuration requests can be increased in the driver. However, this is not the preferred method as this requires modifications to be done to the standard drivers. |
| Dahlia Carrier Board V1.1B |
| HAR-8427 | Fixed | Signal distortion on the audio codec's "Line In" input |
Description: The 10k pull-down resistors R251 and R254 connected to the pins 26 and 24 of the audio codec (IC28) affect the functionality of the device’s internal multiplexers and signal amplifiers. The analog input pins of the audio codec shift the input DC offset to their internal virtual ground VMID. The external pull-down resistors are affecting this DC offset, causing the opening of the internal multiplexer’s analog signal switches and the saturation of the amplifier's outputs. This leads to the distortion of the "Line In" signals (only the positive polarity parts of the input signals are recorded) and crosstalk from the "Line In" input to the "Mic In” input. Workaround: Remove the pull-down resistors R251 and R254 from the carrier board. This makes the audio codec’s "Line In" and "Mic In” inputs work properly. Please see the PDF errata document in the "Errata/Known Issues" section for more information. |
| HAR-3351 | Fixed | Cypress USB-C PD detection chip does not behave as expected on Type-A to Type-C cables |
Description: Because of the unexpected behaviour of the Cypress USB-C PD detection chip, the Dahlia board is turning on even with an improper USB power source. Workaround: Use the Dahlia Carrier board only with suitable USB power sources. Alternatively, USB Type-A to Type-C cables or adapters without a pull-up resistor on CC line can be used. |
| HAR-3302 | Fixed | System doesn't boot with Verdin DSI to LVDS Adapter attached |
Description: When using the Dahlia in combination with a Verdin DSI to LVDS Adapter (connected to X17) and a 10.1” LVDS display
(attached to the adapter), the carrier board won't turn on or will shut down if the power supply input voltage is < 7V. Workaround: Use USB-C PD power supplies with at least 9V or power the board over the barrel connector with at least 7V.
Use a good USB cable. The quality of the cables has an impact on the +V_SUPPLY_FILT voltage stability. |
| HAR-6255 | Fixed | CTRL_FORCE_OFF_MOCI# is disabled |
Description: R96 is not assembled on the product version V1.0C. This disables the “kill-feature” entirely. Therefore, after a shutdown, the main supplies are not turned off. For turning off the main power rails, the power button needs to be pressed for >7s. |
| HAR-3672 | Fixed | CTRL_FORCE_OFF_MOCI# has pull-down instead of pull-up resistor |
Description: The CTRL_FORCE_OFF_MOCI# input on the Dahlia carrier board features a 1MΩ pull-down resistor instead of a pull-up resistor. In the Verdin family definition, the CTRL_FORCE_OFF_MOCI# signal is specified as open-drain signal that is 5V tolerant. The pull-up resistor is supposed to be on the carrier board. Without this pull-up resistor, the CTRL_FORCE_OFF_MOCI# remains low and therefore is asserted all the time.
The CTRL_FORCE_OFF_MOCI# signal is permanently pulling down the kill input of the power button IC LTC2954 (IC10). The LTC2954 ignores the kill input for the first 512ms after turning on. After this internal timer is expired, the kill signal will power off the system. This means pressing the power button on the Dahlia carrier board will turn on the power only for 512ms. Workaround: Removing R96 disables the CTRL_FORCE_OFF_MOCI# signal on the Dahlia carrier board. However, this disables the “kill-feature” entirely. Therefore, after a shutdown, the main supplies are not turned off. For turning off the main power rails, the power button needs to be pressed for >7s. Besides this inconvenience, the modification is compatible with all Verdin module versions. |
| HAR-4396 | Fixed | Dropping Support of HiFi 4 DSP Feature |
Description: The HiFi 4 DSP feature is no longer going to be featured and supported in future hardware versions of this product. Even though some current product versions may theoretically feature the IP in question, to avoid having compatibility issues in the future, please don't use the feature. Workaround: None. |
| HAR-4980 | Fixed | Instability Issue (flickering) on the i.MX8 QXP and i.MX8 DX LVDS Interface |
Description: On 20.07.2020, Toradex has been informed about an LVDS/MIPI DSI instability issue (flickering) affecting NXP's i.MX 8QuadXPlus and i.MX 8DualX SoCs. The affected SoCs have been used in various sample versions of our Colibri iMX8X SoMs, up to V1.0C.
For the affected parts, the LVDS/MIPI DSI display interface clock may not run stable (depending on the die temperature and the voltage applied).
NXP stated that “This failure causes information to be displayed blurry or with the wrong color on the screen. Potentially the screen may be observed to go black, which the driver can perceive as the screen not working.” Workaround: Reducing the die temperature of the SoC can help reduce the probability of seeing the issue. This could be achieved by either reducing the ambient temperature and the computational load of the SoC, or improving the thermal solution applied. We are working with NXP to get screened SoC parts that are not affected by this issue. This issue will be fixed in the next product version. |
| HAR-4304 | Fixed | Inaccurate ADC reading on Colibri iMX8X Module |
Description: The ADC input sampling time can be set between 3 and 131 clocks (of the 24MHz used).
According to the ADC datasheet, at the longest sampling time of 131 clocks, the source output resistance must not be higher than 5kOhm. The resistor value assembled on the affected product version was 10kOhm.
This leads to the sampling capacitor not being fully charged to the input voltage and thus inaccurate ADC conversion results.
In the fixed product versions, the series resistors value has been changed to 1kOhm. Workaround: None. |
| HAR-4399 | Fixed | Instability Issue (flickering) on the i.MX 8QM and i.MX8QP LVDS Interface |
Description: On 07.07.2020 we were informed about an LVDS instability issue (flickering) on new version of NXP i.MX8QM/iMX8QP which are used in our prototype Apalis iMX8 products until version 1.1.B.
NXP stated that “This failure causes information to be displayed blurry or with the wrong color on the screen. Potentially the screen may be observed to go black, which the driver can perceive as the screen not working.” Workaround: We are working with NXP to get screened processors that do not manifest this issue. This issue will be fixed in the next product version. |
| HAR-4305 | Fixed | Inaccurate ADC reading on Apalis iMX8 Module |
Description: The ADC input sampling time can be set between 3 and 131 clocks (of the 24MHz used).
According to the ADC datasheet, at the longest sampling time of 131 clocks, the source output resistance must not be higher than 5kOhm. The resistor value assembled on the affected product version was 10kOhm.
This leads to the sampling capacitor not being fully charged to the input voltage and thus inaccurate ADC conversion results.
In the fixed product versions, the series resistors value has been changed to 1kOhm. Workaround: None. |
| HAR-4106 | Fixed | Power on after SW shut-down not possible |
Description: If the RTC battery is present, it is not possible to turn on the module after shutting it down the PMIC in software. Workaround: Option 1: Do not use the software initiated PMIC shut down. It is possible to shut down the software for making sure the system is in a safe state for removing the power. But the command to the PMIC for shutting down should not be send. Leave the PMIC running and just remove the main input voltage from the module (remove VCC).
Option 2: Assemble C267 for making the power button signal pulse long enough. The capacitor C267 is not assembled on Apalis iMX8 modules with the version 1.1A or older. By assembling C267 with a 10µF 6.3V capacitor with the 0603 size. The power button signal pulse gets its required duration. This means the module can be turned on either by power cycling VCC or by pressing the RESET_MICO# button. |
| Analogue Camera Adapter V2.0C |
| HAR-4972 | Fixed | Analogue Camera Adapter Might Fail to Sync |
Description: Fixed in: 01192002 Analogue Camera Adapter V2.0C
When the Analogue Camera Adapter is connected to the Apalis Evaluation Board in combination with an Apalis iMX6 module, in some limited cases the obtained picture shows quality issues. The problem was mostly seen with Apalis Evaluation Board in combination with Apalis iMX6 modules, but it could also show with other combinations or custom carrier boards. This is due to low signal drive strength of the data signals. In V2.0B series resistors R22 and R33 have been changed from 47R to 22R (Resistor 22 ohm 63mW 5% 0603) to improve the signal quality. In some limited cases the signal strength still may be still too low. That is why we additionally shortened the cable to 50mm in V2.0C. Workaround: Use a ribbon cable with lenght of equal or less then 70mm to connect the Analogue Camera Adapter to the Apalis Evaluation Board. |
| HAR-2331 | Known Issue | Missing SD/SDIO external pull-up resistors may lead to malfunction of SD Cards in default and high speed modes |
Description: The i.MX8M Mini errata number e50080 affects the SDIO interface signals when they are used in Default Speed and High-Speed bus modes without external pull-up resistors because the current capability of these pins could degrade. Workaround: If UHS-I speed modes are used (SDR12, SDR25, DDR50, SDR50, or SDR104), the interface runs in 1.8V. In this case, the 3.3V IO voltage level is only used during the enumeration process. Therefore, UHS-I graded SD cards are recommended to be used. |
| HAR-2332 | Known Issue | Missing pull-up on CAN SPI MISO signals might cause signal flickering |
Description: Missing pullup’s on CAN SPI MISO signals might cause signal flickering. This could result in unecessary higher current consumption.
Workaround: There is no software or hardware workaround available for V1.0 modules. A weak external pullup will be added to V1.1 modules in order to avoid the MISO signal to float. |
| HAR-2333 | Known Issue | MCP2517FDT-H/JHA is assembled instead of MCP2518FDT- E/QBB as indicated in the product datasheet and schematic |
Description: The MCP2517FDT-H/JHA has been assembled instead of MCP2518FDT- E/QBB indicated in the product datasheet. Workaround: Do not use the additional features of the MCP2518. |
| HAR-2326 | Known Issue | No dedicated reset for eMMC |
Description: The dedicated reset input of the boot eMMC on the module is not connected to the SoC. Therefore, the eMMC can only be reset by a power-on reset. Workaround: If the eMMC needs to be reset, a complete system reset needs to be performed which includes a power cycle that triggers the power-on-reset of the eMMC. |
| HAR-3192 | Known Issue | Keeping CTRL_RESET_MICO# down does not keep module in reset |
Description: It is not possible to delay the power up cycle or prolong a reset cycle by keeping the CTRL_RESET_MICO# input signal down. Workaround: Not available. |
| HAR-3240 | Known Issue | Power rails of Wi-Fi module cannot be turned off |
Description: It is not possible to turn off the power rails of the Wi-Fi and Bluetooth module after they have been turned on. Workaround: After booting the module, turn on the power rails for the Wi-Fi and Bluetooth module only if the radio is required. Keep the rails turned on or reboot the system if the rails need to be turned off again. |
| HAR-3366 | Known Issue | Undefined state of CTLR_PWR_EN_MOCI in power-off-state |
Description: Due to back feeding, the CTRL_PWR_EN_MOCI can have a residual voltage. This means the voltage remaining at CTRL_PWR_EN_MOCI can be too high (>0.3V) which can be interpreted as a high state by some input circuits. Workaround: Make sure the input low threshold for the circuits that are connected to the CTRL_PWR_EN_MOCI signals are high enough or use the CTRL_FORCE_OFF_MOCI# for disabling the power rails in power-off-state. |
| HAR-2727 | Known Issue | After power-down the module cannot be turned on by using CTRL_PWR_BTN_MICO# |
Description: After powering down the module, the module cannot be turned on by using the CTRL_PWR_BTN_MICO# signal. Workaround: Power cycle the main supply of the module. One option is to kill the main power rails by using the CTRL_FORCE_OFF_MOCI# signal. |
| HAR-2726 | Known Issue | Undefined state of CTLR_PWR_EN_MOCI during reset cycle |
Description: During a reset cycle the CTRL_PWR_EN_MOCI signal can go to an undefined state. For some time, the signal can be neither high nor low. Workaround: If a defined state of the CTRL_PWR_EN_MOCI is required during the reset cycle, use a comparator circuit. |
| HAR-2728 | Known Issue | Verdin iMX8MM: JTAG Boundary Scan not accessible |
Description: It is not possible to access the JTAG Boundary Scan mode. The JTAG strapping on the module is not correct. An incorrect JTAG ID is read back. Workaround: Not available. |
| HAR-3184 | Known Issue | KSZ9031 assembled instead of KSZ9131 Indicated in the product datasheet and schematic |
Description: The part KSZ9031RNXIC has been assembled instead of KSZ9131RNXI that is indicated in the product datasheet.
Workaround: Not available. |
| HAR-3191 | Known Issue | Incorrect assertion of CTRL_FORCE_OFF_MOCI# in reset and power down cycle |
Description: The CTRL_FORCE_OFF_MOCI# is on the V1.0 module a simple GPIO with an on-module pull-up resistor. Depending on the carrier board, the power can get killed during reset cycle or the power down does not switch off the rails in the expected order. Workaround: In order to be able to perform a reset cycle without killing the power, on the Verdin Development Board the jumper for the CTRL_FORCE_OFF_MOCI# needs to be removed (pin A23 and B23 of X6). On the Dahlia, the resistor R96 needs to be removed for the same purpose. However, this workaround will disable the kill feature of the carrier board. |
| HAR-3195 | Feature Request | Change the name from NFF to Verdin |
Description: The product name printed on the PCB contains NFF instead of Verdin. |
| HAR-5754 | Known Issue | The CTRL_FORCE_OFF_MOCI# signal type is push-pull instead of open-drain |
Description: The signal type of the CTRL_FORCE_OFF_MOCI# has been changed from 1.8V push-pull to a 5V tolerant open-drain. The reason is to simplify the carrier board design and to omit the need for a level shifter on the carrier board. Workaround: On Verdin Development Boards, it is possible to remove the jumper for the CTRL_FORCE_OFF_MOCI# signal (pin A23 an B23 of X6). On the Dahlia carrier board, remove resistor R247. However, both workarounds disable the "kill-feature". Therefore, after a shutdown, the supplies are not turned off. |
| HAR-3379 | Known Issue | Missing pull-up resistor on the WAKE1_MICO# signal |
Description: The Pull-up resistor is missing on the WAKE1_MICO# signal. Workaround: It is recommended to enable the SoM’s internal pull-up of the pin connected to this signal. |
| HAR-3274 | Known Issue | Inconsistency concerning the position of general-purpose LEDs and the order of related signals on connector X38 |
Description: The position of LED21, LED22, LED23, LED24 in the general-purpose LEDs and Switches area is not consistentwith the order of related signals available on the connector X38. Workaround: Users should check table 3.14.2.1.5 of the product datasheet to avoid confusion when using this product feature. |
| HAR-3935 | Known Issue | CTRL_FORCE_OFF_MOCI# is pulled-up to wrong voltage rail |
Description: According to the Verdin specifications, the CTRL_FORCE_OFF_MOCI# is an open-drain output of the module which is 5V tolerant and requires a pull-up resistor on the carrier board. On the Verdin Development Board V1.0B, the CTRL_FORCE_OFF_MOCI# is pulled up to the +V1.8_SW rail. Unfortunately, this rail is switched by the CTRL_PWR_EN_MOCI# signal. During a reset cycle (software or button initiated), the CTRL_PWR_EN_MOCI# signal can go low for power cycling the peripherals on the carrier board. This is disabling also the +V1.8_SW which means the CTRL_FORCE_OFF_MOCI# goes low and triggers the kill input of IC16. IC16 will then kill the main power of the module. This means resetting the module can cause an unintentionally power-off of the system. Workaround: Removing R80 disables the CTRL_FORCE_OFF_MOCI# signal on the Verdin Development Board.
However, this disables the “kill-feature” entirely. Therefore, after a shutdown, the supplies are not turned off which prevents the system to be turned on by using the power button. For turning on the system, either power cycle the whole board or turn off the main 3.3V rail on the carrier board by pressing the power button >3s. Besides this inconvenience, the modification is compatible with all Verdin module versions. |
| HAR-6600 | Known Issue | Ethernet PHY address strapping resistor for configuring PHYAD2 missing |
Description: The last three bits of the PHY address are strapped by the PHYAD0, PHYAD1, and PHYAD2 pin. PHYAD0 and PHYAD1 are located on the LED output signals, which are strapped correctly. PHYAD2 is located on the RXC pin of the PHY (ETH_2_RGMII_RXC signal). The strapping resistors R188 and R189 are both missing in the BOM. Intended by design is to strap the signal high by assembling R188. Since both strapping resistors are missing, the strapping value is dictated by the module’s behavior of the ETH_2_RGMII_RXC signal during the enabling of the Ethernet power rails. The Ethernet power rails are enabled on the carrier board by the PWR_CTRL_4 signal. The Verdin iMX8M Plus has a weak pull-down enabled on the ETH_2_RGMII_RXC by default. Therefore, the PHY address gets strapped to 0b00011 rather than the intended 0b00111. In this case, the module can only communicate over the MDIO interface with the PHY if the driver changes the address to 0b00011. Workaround: The best workaround is to populate R188 with a 10kΩ resistor. The resistor is a 0603 type. See Errata #5 of the Verdin Development Board errata for more information. |
| HAR-8426 | Known Issue | Signal distortion on the audio codec's "Line In" input |
Description: The 10k pull-down resistors R135 and R138 connected to the pins 26 and 24 of the audio codec (IC28) affect the functionality of the device’s internal multiplexers and signal amplifiers. The analog input pins of the audio codec shift the input DC offset to their internal virtual ground VMID. The external pull-down resistors are affecting this DC offset, causing the opening of the internal multiplexer’s analog signal switches and the saturation of the amplifier's outputs. This leads to the distortion of the "Line In" signals (only the positive polarity parts of the input signals are recorded) and crosstalk from the "Line In" input to the "Mic In” input. Workaround: Remove the pull-down resistors R135 and R138 from the carrier board. This makes the audio codec’s "Line In" and "Mic In” inputs work properly. Please see the PDF errata document in the "Errata/Known Issues" section for more information. |
| HAR-8448 | Known Issue | Triggering Recovery Mode on the Apalis iMX8 takes long or the SoM does not go into Recovery Mode |
Description: In some cases, the recovery button of carrier boards needs to be pressed for 6-10s after powering up the SoM to get it into Recovery Mode. In other cases, the SoM does not go into recovery mode at all, even after the 6-10s period has elapsed. The issue is caused by the combination of the NXP i.MX8 SoC's boot ROM code and the behavior of the USB interface of the host computer the USB OTG port of the carrier board is connected to. On the SoC side, at power-up, a boot monitor timer is initialized. During USB enumeration in serial download mode, the host side may enumerate multiple times until enumeration succeeds. The enumeration retries take time and result in a delayed entry into Recovery Mode. In some other cases, the maximum number of enumeration retries may get exceeded, which results in an enumeration failure. Under corner conditions, the ROM code may not be able to refresh the boot monitor timer due to the behavior of the USB host, causing a device system reset. Workaround: In general, changing to a different host is the most effective way to avoid the issues. NXP may potentially fix this issue in the future. |
| HAR-2282 | Known Issue | Wrong capacitor polarity indicated on silkscreen |
Description: Capacitors C4, C5, C9 polarity indicator is not correct on the product silkscreen. Workaround: Not required. The capacitors are assembled according to proper voltage polarity. |
| HAR-892 | Known Issue | VBAT is powering VCC voltage rail |
Description: The VCC_BATT input of the module (pin 40) powers the SNVS rail of the SoC. Besides the RTC and power management function, the i.MX 6ULL SoC uses this rail also as IO rail for the pins in the SNVS block (SNVS pins). Some of these interface pins are available on the SODIMM connector as regular GPIOs (SODIMM pin 43, 45, 93, 95, 105, 107, 127, 131, 137, and 138). Since the VCC_BATT on the Colibri standard is meant to be used as RTC battery input and not for powering IO rails, a power rail switch is added to the module. If the module is powered up, the VCC_BATT rail is connected to the 3.3V rail. |
| HAR-1034 | Known Issue | External RGMII interface would require 1.8V IO voltage |
Description: According to the NXP datasheet for the i.MX 8X SoC, the I/O voltage of the RGMII interface is limited to 1.8V and 2.5V. The RGMII signals of the second Ethernet port is available as alternate functions of the RGB LCD interface. On the Colibri iMX8X, the I/O voltage of these signals is fixed to 3.3V. The maximum voltage of the pins itself is not violated. If the edge connector pins are used for any other function (e.g. RGB LCD or GPIO), the I/O voltage is fully compliant. Even using the pins as RMII for 100Mb/s Ethernet is fully compliant. Only when using the interface pins as RGMII, the I/O voltage is not compliant with the NXP specifications.
No physical damage is expected when using the signals as RGMII with 3.3V I/O voltage since the actual SoC pins are rated for an absolute maximum voltage of 3.6V. However, the timing might not be compliant with the RGMII specifications. Workaround: Use the second Ethernet port as RMII instead of RGMII. However, this limits the maximum interface speed to 100Mb/s (Fast Ethernet). RGMII would allow transfer rates up to 1Gb/s (Gigabit Ethernet). |
| HAR-1380 | Known Issue | RTC current too high |
Description: The current consumption on the RTC battery rail (VCC_BATT) can reach up to 240 µA on earlier modules if the primary voltage rail (3V3) is not applied. The issue affects the Colibri T30 1GB V1.1E and older, but does not affect the Colibri T30 1GB IT. Even though the current consumption is reduced to 56 µA on newer versions of the module, it is recommended to use an external ultra-low power RTC device if the system time needs to be retained without the presence of the primary voltage rail. Workaround: Use an external ultra-low power RTC device (see the Colibri Evaluation Board for reference). |
| HAR-10823 | Known Issue | U-Boot Might Hang While Detecting Memory Size |
Description: The boot process might hang with the following error on 512MB module variant:
```
U-Boot SPL 2023.04-6.4.0-devel+git.96179e4a5bb0 (Sep 06 2023 - 06:13:04 +0000)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.0.7--v09.00.07 (Kool Koala)')
WARNING: Less than 64MB RAM detected
``` Workaround: Reset the board. |
| HAR-4398 | Known Issue | Dropping Support of HiFi 4 DSP Feature |
Description: The HiFi 4 DSP feature will be no longer supported on the future versions of this product. Please don't use this feature on any current product version which theoretically would support it. Workaround: None |
| HAR-8016 | Known Issue | CSI_1_MCLK Voltage Level is not 3.3V |
Description: On the MIPI CSI-2 interface used on the Verdin Development Board V1.1A, all of the single-ended signals are at 3.3V level, except for the CSI_1_MCLK signal (pin #12 of X47), which is at 1.8V level. Workaround: In case a MIPI CSI-2 camera requires the CSI_1_MCLK signal (pin #12 of X47), and in case it requires this signal to be at 3.3V level, it could be level shifted on custom carrier boards. |
| HAR-8017 | Known Issue | CSI_1_MCLK Voltage Level is not 3.3V |
Description: On the MIPI CSI-2 interface used on the Dahlia V1.1A, all of the single-ended signals are at 3.3V level, except for the CSI_1_MCLK signal (pin #12 of X16), which is at 1.8V level. Workaround: In case a MIPI CSI-2 camera requires the CSI_1_MCLK signal (pin #12 of X16), and in case it requires this signal to be at 3.3V level, it could be level shifted on custom carrier boards. |
| HAR-8207 | Known Issue | Ethernet LEDS don't turn off on all Toradex Colibri Carrier Boards in Standby/Suspend Mode on iMX6ULL |
Description: Ethernet LEDS don't turn off on all Toradex Colibri Carrier Boards in Standby/Suspend Mode on iMX6ULL |
| HAR-8210 | Known Issue | POWER_ENABLE_MOCI indeterminate due to backfeeding on Apalis iMX6 |
Description: The POWER_ENABLE_MOCI signal is intended to be used for switching the peripheral voltage rails on the carrier board, like the 5V_SW and 3.3V_SW on the Ixora. Depending on the mount of backfeeding over the interface signals from the carrier board to the Apalis iMX6 module, the POWER_ENABLE_MOCI signal can remain between 1.0V and 1.4V in module shutdown. Depending on the carrier board circuit, this can be too high for turning off the peripheral voltage rails.
For example, on the Ixora V1.2, a different buck converter for the 5V_SW is used than on the previous versions. The threshold voltage for the enable signal is lower on the new buck converter. Depending on the backfeeding level, the 5V_SW buck converter does not get disabled in the shutdown state. The Ixora V1.0 and V1.1 are not affected by this issue since they used a different buck converter with a higher threshold. Workaround: Add a circuit for increasing the POWER_ENABLE_MOCI threshold voltage between 2.0V and 2.5V This could be achieved by adding a comparator or similar circuit. Such a solution is implemented in the V1.3 revision of Ixora.
A simple voltage divider at the POWER_ENABLE_MOCI signal can shift the voltage levels. Important: make sure the minimum input voltage for enabling the buck converter is still guaranteed. With the AOZ2260 buck converter that is used on Ixora V1.2, a 10k/10k voltage divider can be a suitable option. For patching such a divider, replace R15 with 10k 0603 resistor and add another 10k resistor from the PMIC_EN_5V signal to the ground. |
| HAR-8214 | Known Issue | MIPI CSI camera optional master clock output not usable |
Description: The Verdin pinout contains an optional master clock output for the CSI_1 interface. The SAI3_MCLK SoC pin is used for providing the optional Verdin camera interface master clock CSI_1_MCLK output. This signal is available on the module edge connector pin 91. The SoC pin can provide clock signals from the SAI3 and SAI5 audio interfaces. Therefore, a dummy audio driver with a dummy audio stream would be required for enabling the clock output. The current Toradex BSP does not support the CSI_1_MCLK option. Workaround: Instead of using the CSI_1_MCLK, use an external crystal or oscillator for the camera. The i.MX 8M Mini SoC features two general-purpose clock outputs that can be used independently from the audio interfaces. Those clock signals are only available as alternate functions of other signal pins. Therefore, the clock signals are not compatible with other Verdin modules. If one of the general purposes clock outputs are used, adding an assembly option for using the
CSI_1_MCLK pin is highly recommended. This ensures compatibility with existing and future
versions of the Verdin iMX8M Mini and other Verdin modules. |
| HAR-8281 | Feature Request | Create the public zip packages for the Apalis Evaluation Board V1.1 |
Description: We need to create public packages for the Apalis Evaluation Board and add them to the GIT repository. |
| HAR-8290 | Known Issue | The LED status signals of the on-module Ethernet PHY are swapped on the Verdin Development Board |
Description: The KSZ9131 Ethernet PHY on the Verdin modules has two LED outputs (ETH_1_LED_1 and ETH_1_LED_2) which are used for indicating the link and activity statuses on the bus.
These LEDs are available on pin 235 and 237 of the module edge connector, respectively. ETH_1_LED_1 (pin 235) is intended to indicate the activity status, while ETH_1_LED_2 (pin 237) is intended to indicate the link status.
On the PCB versions 1.0 and 1.1, these two signals are swapped.
In the next revision of the carrier board PCB, the connections will be corrected.
In the Verdin Development Board datasheet, the corrected connections are shown. Workaround: For custom carrier board designs, the correct LED connections should be implemented.
A potential workaround could be flipping the roles and behavior of the LED outputs of the on-module Ethernet PHY in software. However, this is not supported by the related driver. |
| HAR-7206 | Known Issue | Series capacitor values are too small for the audio codec’s speaker output to be used in a stereo setup |
Description: The audio codec featured on the Verdin Development Board V1.1 includes an integrated speaker driver. The Verdin Development Board V1.1 provides two operating modes for the audio codec speaker output: mono and stereo. In a mono setup, one or two external speakers are connected as a Bridge Tied Load (BTL) to the connectors X28 and/or X29. In this setup, the speaker output should work fine. In a stereo setup, two external speakers are connected to the connector X13. In this case, one end of each speaker’s coil is connected to the common ground pin (GND), the other ends are connected to the audio codec IC through the capacitors C182 or C183, respectively. The capacitors C182 (1uF) and C183 (1uF), in conjunction with the speaker’s impedance (8Ohm), form high-pass filters. The cut-off frequency of the high-pass filters is around 20 kHz. This frequency is at the upper edge of the audible frequency range, and lower frequencies are attenuated/filtered out by the aforementioned high-pass filter. Workaround: A partial workaround has already been applied to the Verdin Development Board V1.1A: 0Ohm resistors have been assembled instead of the capacitors C182, C183. To complete the workaround, external capacitors connected in series with the external speakers are required (see Figure 3). The exact values of the capacitors depend on the desired cut-off frequency and the impedance of the speakers. Some applications may not require the complete audible frequency range of approx. 20Hz – 20Hz to be available. The low-frequency limit is 100Hz for many low-power speakers, so it may be unnecessary to go below this cut-off frequency. For 8Ohm speakers, our recommendation is to use either 220uF series capacitors for a cut-off frequency of approx. 90Hz or 470uF for 42Hz respectively (minimum 6.3V rated in both cases). Please check Errata #6 in the Verdin Development Board errata for more information. |
| HAR-6830 | Known Issue | Apalis iMX8 Unexpected Reset States of some GPIO Pins |
Description: The pin configuration registers of the i.MX8 SoC have reset states. These reset states have been stated in the Toradex Apalis iMX8 datasheet (document revision 1.1 and earlier) as reset states in section 4.4.
However, the i.MX 8 SoC features a System Controller Unit (SCU) that handles all of the pin configurations. The SCU comes with a firmware (SCFW) that has its own default pin configurations. By the time of the release of the RESET_MOCI# signal, the SCU already overrides the pin configurations. Therefore, the SCU default settings are the relevant reset states for the pins. In case of some of the GPIO-capable pins, the SCFW reset states are different from the register reset states. A comparison list can be found in this article: https://developer.toradex.com/knowledge-base/reset-state-of-the-imx8-soc-pins. The Apalis iMX8 datasheet (document revision 1.2 and newer) has been updated with the reset values dictated by the SCFW.
Despite the original intention, the USBO1_EN and the USBH_EN have pull-up resistors enabled instead of being pulled down during reset. This means that the USB power rails can get unintentionally enabled in the reset state of the module.
Depending on the carrier board, the different reset states of the SoC pins can result in unintended behavior. For example, on the Ixora carrier board V1.2A, the MMC1_D5 (pin 152) and MMC1_D6 (pin 156) are used for driving LEDs. By default, these two pins have pull-up resistors enabled instead of the pull-down. Therefore, the LEDs are lit during the reset cycle. Workaround: The values of the internal pull-up and pull-down resistors of the SoC are between 15kΩ and 50kΩ. These pull resistors can be disabled in the bootloader or during kernel boot. The issue caused by the unintentional pull-resistor states persists in time between the release of the reset signal and the bootloader configuring the IO pins in the intended state. In that case, an external pull-resistor on the carrier board can resolve the issue. According to measurements, adding a 10k pull-down resistor to a GPIO-capable pin with an internal pull-up resistor enabled results in a voltage level of around 0.6V. With an external 1k pull-down, the level goes below 100mV. However, these are just typical values at room temperature.
For the USBO1_EN and the USBH_EN signals, it is recommended to add a 10k pull-down resistor (or replacing the existing weak pull-down resistor). This keeps the power enable signal level below the maximum input low threshold of the USB power switch IC during the reset cycle. |
| HAR-8291 | Known Issue | The LED status signals of the on-module Ethernet PHY are swapped on the Dahlia |
Description: The KSZ9131 Ethernet PHY on the Verdin modules has two LED outputs (ETH_1_LED_1 and ETH_1_LED_2) which are used for indicating the link and activity statuses on the bus.
These LEDs are available on pin 235 and 237 of the module edge connector, respectively. ETH_1_LED_1 (pin 235) is intended to indicate the activity status, while ETH_1_LED_2 (pin 237) is intended to indicate the link status.
On the PCB versions 1.0 and 1.1, these two signals are swapped.
In the next revision of the carrier board PCB, the connections will be corrected.
In the Dahlia datasheet, the corrected connections are shown. Workaround: For custom carrier board designs, the correct LED connections should be implemented.
A potential workaround could be flipping the roles and behavior of the LED outputs of the on-module Ethernet PHY in software. However, this is not supported by the related driver. |
| HAR-8250 | Known Issue | High peak current caused by the 10.1'' LVDS display due to the brightness control implementation |
Description: The backlight inverter of the 10.1'' LVDS display might create high current peaks on the two VCC/LED+ pins of the LVDS connector (pins 29 and 30 of CON4-INPUT).
The PWM backlight control signal directly enables and disables the backlight inverter. Enabling the inverter can cause an inrush current. Since the inverter is disabled and re-enabled continuously, this can cause repeated current peaks. Especially at low backlight levels, these peaks can be significant. Workaround: Customers should check the power supply circuit used to generate the LVDS VCC/LED+ voltage on the carrier board, to ensure it can provide at least 650mA at 12V. |
| HAR-6903 | Known Issue | Triggering Recovery Mode on the Colibri iMX8X takes long or the SoM does not go into Recovery Mode |
Description: In some cases, the recovery button of carrier boards needs to be pressed for 6-10s after powering up the SoM to get it into Recovery Mode. In other cases, the SoM does not go into recovery mode at all, even after the 6-10s period has elapsed. The issue is caused by the combination of the NXP i.MX8X SoC's boot ROM code and the behavior of the USB interface of the host computer the USB OTG port of the carrier board is connected to. On the SoC side, at power-up, a boot monitor timer is initialized. During USB enumeration in serial download mode, the host side may enumerate multiple times until enumeration succeeds. The enumeration retries take time and result in a delayed entry into Recovery Mode. In some other cases, the maximum number of enumeration retries may get exceeded, which results in an enumeration failure. Under corner conditions, the ROM code may not be able to refresh the boot monitor timer due to the behavior of the USB host, causing a device system reset. Workaround: In general, changing to a different host is the most effective way to avoid the issues. NXP may potentially fix this issue in the future. |
| HAR-8349 | Known Issue | POWER_ENABLE_MOCI indeterminate due to backfeeding on Apalis iMX8X |
Description: The POWER_ENABLE_MOCI signal is intended to be used for switching the peripheral voltage rails on the carrier board, like the 5V_SW and 3.3V_SW on the Ixora. Depending on the mount of backfeeding over the interface signals from the carrier board to the Apalis iMX8X module, the POWER_ENABLE_MOCI signal can remain between 1.0V and 1.4V in module shutdown. Depending on the carrier board circuit, this can be too high for turning off the peripheral voltage rails.
For example, on the Ixora V1.2, a different buck converter for the 5V_SW is used than on the previous versions. The threshold voltage for the enable signal is lower on the new buck converter. Depending on the backfeeding level, the 5V_SW buck converter does not get disabled in the shutdown state. The Ixora V1.0 and V1.1 are not affected by this issue since they used a different buck converter with a higher threshold. Workaround: Add a circuit for increasing the POWER_ENABLE_MOCI threshold voltage between 2.0V and 2.5V This could be achieved by adding a comparator or similar circuit. Such a solution is implemented in the V1.3 revision of Ixora.
A simple voltage divider at the POWER_ENABLE_MOCI signal can shift the voltage levels. Important: make sure the minimum input voltage for enabling the buck converter is still guaranteed. With the AOZ2260 buck converter that is used on Ixora V1.2, a 10k/10k voltage divider can be a suitable option. For patching such a divider, replace R15 with 10k 0603 resistor and add another 10k resistor from the PMIC_EN_5V signal to the ground. |
| HAR-8447 | Known Issue | Triggering Recovery Mode on the Apalis iMX8X takes long or the SoM does not go into Recovery Mode |
Description: In some cases, the recovery button of carrier boards needs to be pressed for 6-10s after powering up the SoM to get it into Recovery Mode. In other cases, the SoM does not go into recovery mode at all, even after the 6-10s period has elapsed. The issue is caused by the combination of the NXP i.MX8X SoC's boot ROM code and the behavior of the USB interface of the host computer the USB OTG port of the carrier board is connected to. On the SoC side, at power-up, a boot monitor timer is initialized. During USB enumeration in serial download mode, the host side may enumerate multiple times until enumeration succeeds. The enumeration retries take time and result in a delayed entry into Recovery Mode. In some other cases, the maximum number of enumeration retries may get exceeded, which results in an enumeration failure. Under corner conditions, the ROM code may not be able to refresh the boot monitor timer due to the behavior of the USB host, causing a device system reset. Workaround: In general, changing to a different host is the most effective way to avoid the issues. NXP may potentially fix this issue in the future. |
| HAR-8522 | Known Issue | The Audio Codec Does not Reset Correctly with Low-Impedance Headphones Plugged in |
Description: The headphone output signals of the SGTL5000 audio codec (SODIMM pin 316: AAP1_HP_L and SODIMM pin 318: AAP1_HP_R) have a DC offset of around 1.65V. Series capacitors must be placed between the SoM edge connector pins and the headphones to block this offset voltage. The Toradex reference design uses values between 47µF and 100µF for this purpose.
With headphones plugged in, these series capacitors get charged with 1.65V. In a software-initiated reset cycle (software reboot), all power rails of the SoM are turned off. After a delay of 5ms, the rails get re-enabled, and the SoM starts booting. The SGTL5000 can only be reset by power cycling it, as the codec does not have a dedicated reset input.
If headphones are plugged in during a software reboot, the voltage at the series capacitors is backfeeding to the power rails of the audio codec. The series capacitors are not fully discharged since the power rails are turned off only for around 5ms. The voltage at the 3.3V analog rail of the audio codec remains at about 1.5V. The residual voltage can cause the audio codec to not reset properly. This reset issue can prevent the audio codec from functioning properly. Power cycling the SoM resolves the problem.
The issue only occurs during software reboots. Regular power cycles are not affected. The issue mainly appears when low-impedance headphones are used. Occurrences are less frequent with high-impedance headphones (devices with smaller drivers).
When using the headphone output as a high-impedance line output signal, the resulting backfeeding current is low enough to not cause an issue. Without headphones plugged in, the circuit is open, and therefore no backfeeding occurs. This means, that there is no residual voltage, and consequently, the software reset works properly. Workaround: A locked-up audio codec can be recovered by power cycling the SoM.
Using high-impedance headphones instead of low-impedance ones reduces the backfeeding current (and therefore the risk of having this issue manifest itself). Using the headphone output as a line-out signal with an external amplifier further helps to reduce the backfeeding.
In case only high-impedance headphones are used (or the interface is used as a line out signal), the series capacitors' values can be reduced without sacrificing the signal quality at low frequencies. Series capacitors with lower resistances discharge faster and reduce the residual voltage during a software reboot.
If the audio codec needs to be able to reliably reset when used in combination with low-impedance headphones, an additional discharge circuit can be added to the carrier board. The idea behind this circuit is to discharge the series capacitors while the RESET_MOCI# signal is low. A resistor value of 47R is a good choice for series capacitors with values between 47µF and 100µF. The example circuit can be found in the related errata document. |
| HAR-8982 | Known Issue | KSZ8041 Errata 2 can cause Ethernet not working at certain temperatures |
Description: The Microchip KSZ8041 Ethernet PHY has an errata: https://ww1.microchip.com/downloads/en/DeviceDoc/80000700A.pdf. According to the second item in the document, a small percentage (less than 1%) of the devices can potentially fail to properly read the strapping pins and set the intended configuration if the 3.3V supply rail rises too fast.
On the Colibri iMX6ULL SoM, the 3.3V power rail for the Ethernet rises faster than the required 250us. Therefore, on rare occasions, a small amount of Colibri iMX6ULL SoMs may fail to communicate with the Ethernet PHY after power-up. If the strapping of the PHY configuration fails, the system cannot communicate with the PHY over the MDIO interface. The Ethernet port is not working in this case. According to our tests, the issue mainly appears on the affected modules if the power is enabled at extremely low temperatures (below -30°C).
The pull-up resistors of the Ethernet LEDs on the carrier board can backfeed to the 3.3V Ethernet power rail on the module. This backfeeding actually reduces the risk of strapping failures. Workaround: There is currently no permanent workaround. If the Ethernet PHY is not accessible, try to power cycle the Ethernet PHY or the complete Colibri SoM. Disabling the RMII clock turns off the Ethernet power rails. Try waiting at least 1 second before reenabling the RMII clock and initializing the Ethernet PHY. |
| HAR-8976 | Known Issue | Silkscreen of the USB Type-A indication LEDs is swapped |
Description: For the dual stacked USB host connector (X53), the assignments of the upper and lower ports and the related power status indication LEDs are swapped. LED5 is indicating the power status of the lower port, while LED4 is indicating the power status of the upper port. The silkscreen is going to be updated in a future product version. Workaround: There is no workaround to the issue. |
| HAR-9336 | Known Issue | Potential system crashes at full system load |
Description: The Apalis iMX8 is featuring the NXP i.MX8 System-on-Chip (SoC). There's an issue affecting the QuadMax variant of the SoC. The System-on-Chip (SoC) may crash and cause a system crash when running under full load, where full load refers to a 100% load of the 2x A72 and 4x A53 cores, and a 100% load of both GPUs. The actual manifestation and impact of the crash is unpredictable, and varies from a single non-functional interface to a completely non-functional system. The QuadPlus variant of the SoC is not affected. Workaround: Turn off one of the A72 cores in software to work around the issue. |
| HAR-10048 | Known Issue | Operating temperature range limitation |
Description: Some Apalis iMX8 product configurations feature a Wi-Fi/Bluetooth module. The module featured on the System-on-Module (SoM) is limiting the effective operating temperature range of the product to -30C...85C. When powering up/booting the SoM at ambient temperatures of -30C and below, the Wi-Fi/Bluetooth module may fail to start and function properly. As the Wi-Fi/Bluetooth functionality is not considered boot-critical, the SoM may still be used throughout the full specified temperature range (-40C...85C). When powering up/booting the SoM at ambient temperatures of -30C and below, the warming up the Wi-Fi/Bluetooth module (by the heat dissipated by the other components) may eventually result in the Wi-Fi/Bluetooth module starting and functioning properly. Workaround: Power up/boot the SoM at ambient temperatures of -30C or above. If this is not feasible, monitor the status of the Wi-Fi/Bluetooth module in software after powering up/booting the SoM, and reset the SoM in case the Wi-Fi/Bluetooth module failed to start/initialize properly. The reset could be initiated both in software and hardware. Repeat this procedure until you have a functional Wi-Fi/Bluetooth module. |
| HAR-10131 | Known Issue | Change OSC4 to a crystal based oscillator |
Description: The oscillator used as a clock source for the Ethernet PHY has a frequency stability that is in line with the requirements of this IC. On the other hand, since it is a MEMS-based oscillator, it is affected by a high level of Jitter that might negatively impact the related test in the Ethernet compliance validation.
Succeding product revisions will feature a crystal-based oscillator, which ensures a lower level of Jitter. |
| HAR-10469 | Known Issue | Verdin iMX8M Mini incorrect CTRL_PWR_BTN_MICO# behavior |
Description: The circuit used to generate the CTRL_PWR_BTN_MICO# on the computer module is affected by a hardware bug that could cause this signal to be triggered involuntarily by a fast change in the input voltage. The Voltage needs to increase immediately by at least by 0.9V to trigger the signal. The CTRL_PWR_BTN_MICO# allows the implementation of a power button behavior like the ones used on regular personal computers and smartphones. Short pressing the power button powers up the system from the “Module OFF” state or wakes the system from the sleep state. If the module is running, short pressing the power button generates a software interrupt. Depending on the operating system settings, this starts a software shutdown or opens a menu that lets the customer decide what to do. Workaround: The best way to mitigate this issue is to configure the CTRL_PWR_BTN_MICO# differently in the software. If this is not possible and it is necessary to test the behavior of a module where this issue has been fixed, please contact the support team.
Future versions of this product will have a different assembly option that will solve this bug completely. |
| HAR-10710 | Known Issue | Verdin iMX8M Plus incorrect CTRL_PWR_BTN_MICO# behavior |
Description: The circuit used to generate the CTRL_PWR_BTN_MICO# on the computer module is affected by a hardware bug that could cause this signal to be triggered involuntarily by a fast change in the input voltage. The Voltage needs to increase immediately by at least by 0.9V to trigger the signal. The CTRL_PWR_BTN_MICO# allows the implementation of a power button behavior like the ones used on regular personal computers and smartphones. Short pressing the power button powers up the system from the “Module OFF” state or wakes the system from the sleep state. If the module is running, short pressing the power button generates a software interrupt. Depending on the operating system settings, this starts a software shutdown or opens a menu that lets the customer decide what to do. Workaround: The best way to mitigate this issue is to configure the CTRL_PWR_BTN_MICO# differently in the software. If this is not possible and it is necessary to test the behavior of a module where this issue has been fixed, please contact the support team.
Future versions of this product will have a different assembly option that will solve this bug completely. |
