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Migrate from Iris V1.1 to V2.0

 

Article updated at 23 Nov 2020
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Introduction

This is a brief article that helps customers to migrate from the Iris Carrier Board V1.1 to V2.0, especially focusing on software aspects.

Prerequisites

For a better experience while going through this article:

LVDS

The most outstanding changes that may impact customers are on the LVDS circuit and connector.

LVDS Power down Signal

On the Iris V2.0 the RWRDN# (Power down) signal is connected to the SODIMM99 by default, whereas on V1.1 it was connected to 3.3V. You have some options:

  • Permanently connect it to 3.3 volts by soldering a 0Ohm resistor R98 and removing R86 (or just move R86 to R98 also works).
  • Control the GPIO from your user-space application.
  • Set this pin in the device tree (Vybrid) or kernel source (Tegra) so the converter is always on.

&gpio7 {
	lvds_tx_on {
		gpio-hog;
		gpios = <11 0>; /* SODIMM 99 */
		output-high;
	};
};

Colibri T20

On Colibri T20 SODIMM 99 is an output with a buffer on the module. Check the datasheet Figure 4 for more details.

If you want to have LVDS output on Colibri T20 we need to do two things. First, we need to make sure that the buffer is tri-stated (High-Z) and the actual GPIO for SODIMM 99 driven high in order for the RGB-to-LVDS transceiver to turn on.

With the following code added, SODIMM 99 will by default be driven high. You can then change the output via sysfs in /sys/class/gpio/gpio203/value by writing a 0 or 1.

diff --git a/arch/arm/mach-tegra/board-colibri_t20-pinmux.c b/arch/arm/mach-tegra/board-colibri_t20-pinmux.c
index e2db57e783c4a..82a5ab9673cb0 100644
--- a/arch/arm/mach-tegra/board-colibri_t20-pinmux.c
+++ b/arch/arm/mach-tegra/board-colibri_t20-pinmux.c
@@ -368,15 +368,9 @@ int __init colibri_t20_pinmux_init(void)
        gpio_request(TEGRA_GPIO_PI4, "SODIMM 87 nRESET_OUT");
        gpio_direction_output(TEGRA_GPIO_PI4, 1);

-#if defined(CONFIG_CAN_SJA1000) || defined(CONFIG_CAN_SJA1000_MODULE)
-       /* not tri-stating GMI_WR_N on SODIMM pin 99 nPWE */
-       gpio_request(TEGRA_GPIO_PT5, "GMI_WR_N on 99");
-       gpio_direction_output(TEGRA_GPIO_PT5, 0);
-#else /* CONFIG_CAN_SJA1000 | CONFIG_CAN_SJA1000_MODULE */
        /* tri-stating GMI_WR_N on SODIMM pin 99 nPWE */
        gpio_request(TEGRA_GPIO_PT5, "no GMI_WR_N on 99");
        gpio_direction_output(TEGRA_GPIO_PT5, 1);
-#endif /* CONFIG_CAN_SJA1000 | CONFIG_CAN_SJA1000_MODULE */

        /* not tri-stating GMI_WR_N on SODIMM pin 93 RDnWR */
        gpio_request(TEGRA_GPIO_PT6, "GMI_WR_N on 93 RDnWR");
diff --git a/arch/arm/mach-tegra/board-colibri_t20.c b/arch/arm/mach-tegra/board-colibri_t20.c
index cd5b3e3c757f9..b9fa95d3ac86b 100644
--- a/arch/arm/mach-tegra/board-colibri_t20.c
+++ b/arch/arm/mach-tegra/board-colibri_t20.c
@@ -587,6 +587,7 @@ static struct gpio colibri_t20_gpios[] = {
        {TEGRA_GPIO_PX6,        GPIOF_IN,       "102, I X13 ForceOFF#"},
        {TEGRA_GPIO_PX7,        GPIOF_IN,       "104, I X14 ForceOFF#"},
        {TEGRA_GPIO_PZ2,        GPIOF_IN,       "SODIMM pin 156"},
+       {TEGRA_GPIO_PZ3,        GPIOF_OUT_INIT_HIGH, "LVDS PWRDN# pin 99"}
        {TEGRA_GPIO_PZ4,        GPIOF_IN,       "SODIMM pin 164"},
 #if !defined(GMI_32BIT) && !defined SDHCI_8BIT
        {TEGRA_GPIO_PAA4,       GPIOF_IN,       "SODIMM pin 166"},

Checking this and setting appropriate vidargs in U-Boot will make the LVDS screen work. For example for the Toradex Capacitive Touch Display 10.1" LVDS display: setenv vidargs video=tegrafb0:1280x800-16@60 && saveenv

Colibri T30

On Colibri T30 SODIMM 99 is an output with a buffer on the module. Check the datasheet Figure 4 for more details.

If you want to have LVDS output on Colibri T30 we need to do two things. First, we need to make sure that the buffer is tri-stated (High-Z) and the actual GPIO for SODIMM 99 driven high in order for the RGB-to-LVDS transceiver to turn on.

With the following code added, SODIMM 99 will by default be driven high. You can then change the output via sysfs in /sys/class/gpio/gpio203/value by writing a 0 or 1.

diff --git a/arch/arm/mach-tegra/board-colibri_t30-pinmux.c b/arch/arm/mach-tegra/board-colibri_t30-pinmux.c
index 1dac029403312..dff468eb73ca5 100644
--- a/arch/arm/mach-tegra/board-colibri_t30-pinmux.c
+++ b/arch/arm/mach-tegra/board-colibri_t30-pinmux.c
@@ -507,13 +507,8 @@ static __initdata struct tegra_pingroup_config colibri_t30_pinmux[] = {
 #else
        DEFAULT_PINMUX(SDMMC3_DAT3, PWM0, PULL_DOWN, NORMAL, INPUT),
 #endif
-#if defined(CONFIG_CAN_SJA1000) || defined(CONFIG_CAN_SJA1000_MODULE)
-//not tri-stating GMI_WR_N on nPWE SODIMM pin 99
-       DEFAULT_PINMUX(SDMMC3_DAT4, SDMMC3, PULL_DOWN, TRISTATE, OUTPUT),
-#else /* CONFIG_CAN_SJA1000) | CONFIG_CAN_SJA1000_MODULE */
 //tri-stating GMI_WR_N on nPWE SODIMM pin 99
        DEFAULT_PINMUX(SDMMC3_DAT4, SDMMC3, PULL_UP, TRISTATE, OUTPUT),
-#endif /* CONFIG_CAN_SJA1000) | CONFIG_CAN_SJA1000_MODULE */
 //not tri-stating GMI_WR_N on RDnWR SODIMM pin 93
        DEFAULT_PINMUX(SDMMC3_DAT5, SDMMC3, PULL_DOWN, TRISTATE, OUTPUT),
 //multiplexed ULPI_STP used as SSPFRM
diff --git a/arch/arm/mach-tegra/board-colibri_t30.c b/arch/arm/mach-tegra/board-colibri_t30.c
index 9b6ef7b116eaf..741ae5f0b5792 100644
--- a/arch/arm/mach-tegra/board-colibri_t30.c
+++ b/arch/arm/mach-tegra/board-colibri_t30.c
@@ -553,6 +553,7 @@ static struct gpio colibri_t30_gpios[] = {
 //     {TEGRA_GPIO_PZ1,        GPIOF_IN,       "SODI-98, Iris X16-13"},
 #endif
 //     {TEGRA_GPIO_PZ2,        GPIOF_IN,       "SODIMM pin 156"},
+       {TEGRA_GPIO_PZ3,        GPIOF_OUT_INIT_HIGH,    "LVDS PWRDN# pin 99"},
 //     {TEGRA_GPIO_PZ4,        GPIOF_IN,       "SODIMM pin 164"},
        {TEGRA_GPIO_PBB4,       GPIOF_IN,       "SODIMM pin 166"},
        {TEGRA_GPIO_PBB5,       GPIOF_IN,       "SODIMM pin 168"},

Checking this and setting appropriate vidargs in U-Boot will make the LVDS screen work. For example for the Toradex Capacitive Touch Display 10.1" LVDS display: setenv vidargs video=tegrafb0:1280x800-16@60 && saveenv

LVDS Converter Configuration

You may need to configure the LVDS converter to make it work properly for your display resolution.

Instructions on how to configure the LVDS converter in our BSP will be available soon. If you have urgency, you can:

  • Go through the section 3.7.4 LVDS Connector (X7) of the Iris datasheet and page 12 (LVDS) of the schematics PDF.
  • Contact our support.

SD Card

On the V2.0 of the Iris carrier board, the pull-up resistors on the SD card interface have been left away. This has the advantage for modules that have the ability to switch the SD card voltage rail to 1.8V to make use of faster transfer speeds in UHS mode. According to the SD card specification, data-lines should not be left floating hence we need to pull them up with SoC pinmuxing in device tree or platform data.

Colibri T20

On Colibri T20 we cannot switch the voltage rail of the SD card to 1.8V hence it is not possible to use UHS speeds. But we still need to make sure that the pull-ups are enabled to meet the SD card specification. You can do this in platform data as shown in the following patch:

diff --git a/arch/arm/mach-tegra/board-colibri_t20-pinmux.c b/arch/arm/mach-tegra/board-colibri_t20-pinmux.c
index e2db57e783c4a..a7c8fa5aa09a4 100644
--- a/arch/arm/mach-tegra/board-colibri_t20-pinmux.c
+++ b/arch/arm/mach-tegra/board-colibri_t20-pinmux.c
@@ -120,7 +120,7 @@ static __initdata struct tegra_pingroup_config colibri_t20_pinmux[] = {
    Tristating would significantly reduce I/O power consumption. */
        /* nRESET_OUT de-asserted further down below, GPIO I3, I4 and I6 */
        {TEGRA_PINGROUP_ATA,    TEGRA_MUX_GMI,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
-       {TEGRA_PINGROUP_ATB,    TEGRA_MUX_SDIO4,        TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_ATB,    TEGRA_MUX_SDIO4,        TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},
        /* nCSx, AD0, AD1, AD2, AD3, AD4, AD5, AD6 and AD7, nWR, nOE, GPIO K0, K1, K2, K3 and K4 */
        {TEGRA_PINGROUP_ATC,    TEGRA_MUX_GMI,          TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
        /* AD8, AD9, AD10 and AD11 */
@@ -173,7 +173,7 @@ static __initdata struct tegra_pingroup_config colibri_t20_pinmux[] = {
 #else
        {TEGRA_PINGROUP_DTF,    TEGRA_MUX_I2C3,         TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
 #endif
-       {TEGRA_PINGROUP_GMA,    TEGRA_MUX_SDIO4,        TEGRA_PUPD_NORMAL,      TEGRA_TRI_NORMAL},
+       {TEGRA_PINGROUP_GMA,    TEGRA_MUX_SDIO4,        TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},
        /* MM_CD */
        {TEGRA_PINGROUP_GMB,    TEGRA_MUX_GMI_INT,      TEGRA_PUPD_PULL_UP,     TEGRA_TRI_NORMAL},
        /* BT_TXD, BT_RXD, BT_CTS and BT_RTS, GPIO K7 */

Colibri T30

On Colibri T30 the pull-up resistors are enabled by default in our BSP. No adjustments are needed for this module.