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  1. BSP 5
    1. Introduction
    2. Modules
    3. Apalis
    4. Colibri
    5. Verdin
    6. Carrier Boards
      1. Colibri Evaluation board
      2. Colibri Aster board
    7. User-space access
      1. Kernel-space drivers
  2. BSP 3
    1. Overview
    2. Modules
      1. Apalis iMX6
      2. Apalis iMX8
      3. Apalis iMX8X
      4. Apalis TK1
      5. Colibri iMX6
      6. Colibri iMX6ULL
      7. Colibri iMX7
      8. Colibri iMX8X
    3. Carrier Boards
      1. Colibri Evaluation board
      2. Colibri Aster board
    4. User-space access
      1. Kernel-space drivers
  3. BSP 2.8
    1. Overview
    2. Modules
      1. Apalis iMX6
      2. Apalis iMX8
      3. Apalis iMX8X
      4. Apalis T30
      5. Apalis TK1
      6. Colibri iMX6
      7. Colibri iMX6ULL
      8. Colibri iMX7
      9. Colibri iMX8X
      10. Colibri T20
      11. Colibri T30
      12. Colibri VFxx
    3. Carrier Boards
      1. Colibri Evaluation board
      2. Colibri Aster board
    4. User-space access
      1. Kernel-space drivers
    5. Frequency
      1. Colibri T20
Article updated at 02 Sep 2021
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BSP 5

Introduction

The Apalis standard provides two SPI interfaces compatible with all modules of the Apalis family.

MXM3 Pin Apalis Signal Name Description
225 SPI1_MOSI SPI Master Output, Slave Input; SPI Data Out (DOUT)
223 SPI1_MISO SPI Master Input, Slave Output; SPI DATA In (DIN)
227 SPI1_CS SPI Chip Select; SPI Enable Signal; SPI Slave Select
221 SPI1_CLK SPI Serial Clock; (SCK)
231 SPI2_MOSI SPI Master Output, Slave Input; SPI Data Out (DOUT)
229 SPI2_MISO SPI Master Input, Slave Output; SPI DATA In (DIN)
233 SPI2_CS SPI Chip Select; SPI Enable Signal; SPI Slave Select
235 SPI2_CLK SPI Serial Clock; (SCK)

The Colibri standard provides one SPI interface compatible with all modules of the Colibri family which historically is called Synchronous Serial Port (SSP).

SODIMM Pin Colibri Signal Name SSP Description SPI Description
86 SSPFRM Synchronous Serial Port Frame SPI Chip Select; SPI Enable Signal; SPI Slave Select
88 SSPSCLK Synchronous Serial Port Clock SPI Serial Clock; (SCK)
90 SSPRXD Synchronous Serial Port Receive SPI Master Input / Slave Output (MISO); SPI DATA In (DIN)
92 SSPTXD Synchronous Serial Port Transmit SPI Master Output / Slave Input (MOSI); SPI Data Out (DOUT)

The Verdin Family Specification provides one SPI interface in the category Always Compatible, available on all modules of the Verdin family. The interface features a single chip select pin.

SODIMM Pin Apalis Signal Name Description
196 SPI_1_CLK SPI Serial Clock; (SCK)
198 SPI_1_MISO SPI Master Input, Slave Output; SPI DATA In (DIN)
200 SPI_1_MOSI SPI Master Output, Slave Input; SPI Data Out (DOUT)
202 SPI_1_CS SPI Chip Select; SPI Enable Signal; SPI Slave Select

The standard SPI interfaces are enabled by default. Most modules offer additional (non-standard) SPI interfaces, to enable these device trees or board files aka platform data customization is required.

The Colibri Evaluation Board provides an MCP2515 SPI CAN controller. For Colibri modules the kernel driver for this CAN controller is active by default and no userspace SPI access is possible, i.e. the /dev/spidevA.B device files are not available. See the carrier board section for further information.

Modules

Apalis

The Apalis module standard features two generic SPI interface:

SoM Interface Device nodes names Note
SPI1 /dev/apalis-spi1-cs0 General Purpose
SPI2 /dev/apalis-spi2-cs0 General Purpose

To obtain the device nodes names for the Apalis module family:

# ls -l /dev/apalis-spi*

It will display the available Verdin pin-compatible SPIs and display the corresponding names used by the BSP. Those corresponding names are important because the Linux kernel logs will print the real device names (e.g. /dev/spidev3.0), not the Apalis symlinks (e.g. /dev/apalis-spi1-cs0).

For non-standard interfaces, consult the specific SoM datasheet.

Colibri

The Colibri module standard features only one generic SPI interface:

SoM Interface Device nodes names Note
SPI1 /dev/colibri-spi1-cs0 General Purpose

To obtain the device nodes names for the Colibri module family:

# ls -l /dev/colibri-spi*

It will display the available Colibri pin-compatible SPIs and display the corresponding names used by the BSP. Those corresponding names are important because the Linux kernel logs will print the real device names (e.g. /dev/spidev3.0), not the Verdin symlinks (e.g. /dev/colibri-spi1-cs0).

For non-standard interfaces, consult the specific SoM datasheet.

Verdin

The Verdin module standard features only one generic SPI interface:

SoM Interface Device nodes names Note
SPI1 /dev/verdin-spi1-cs0 General Purpose

To obtain the device nodes names for the Verdin module family:

# ls -l /dev/verdin-spi*

It will display the available Verdin pin-compatible SPIs and display the corresponding names used by the BSP. Those corresponding names are important because the Linux kernel logs will print the real device names (e.g. /dev/spidev3.0), not the Verdin symlinks (e.g. /dev/verdin-spi1-cs0).

For non-standard interfaces, consult the specific SoM datasheet.

Carrier Boards

Colibri Evaluation board

By default our BSPs use the MCP2515 SPI CAN controller as available on our Colibri Evaluation board V3.x.

For eMMC-based SoMs, there is an overlay, colibri-imx6-eval_spidev_overlay.dtbo, so in order to use it, you should add it on the overlays.txt file in the /boot directory. To do this, open the file with the following command and add this overlay binary to the fdt_overlays= variable.

# vi /boot/overlays.txt

In this case, here is how it was before:

fdt_overlays=colibri-imx6_lcd-vga_overlay.dtbo colibri-imx6_stmpe-ts_overlay.dtbo

And here is how it should be after:

fdt_overlays=colibri-imx6_lcd-vga_overlay.dtbo colibri-imx6_stmpe-ts_overlay.dtbo colibri-imx6-eval_spidev_overlay.dtbo

For NAND-based SoMs, in order to use spidev instead one needs to disable (e.g. status = "disabled") the mcp2515 device tree node and enable (e.g. status = "okay") the spidev one and re-generate and deploy the device tree to the target. The specific changes are outlined below, as an example, the device tree for a Colibri iMX7 is given:

diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 1db5aa5..28a8bc7 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -101,14 +101,14 @@
interrupt-parent = <&gpio5>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
spi-max-frequency = <10000000>;
-               status = "okay";
+               status = "disabled";
};
spidev0: spidev@0 {
compatible = "toradex,evalspi";
reg = <0>;
spi-max-frequency = <23000000>;
-               status = "disabled";
+               status = "okay";
};
};

Colibri Aster board

Aster doesn't include the mcp2515 SPI CAN controller, so spidev is enabled by default. As SPI is accessible on both X18 and X20 two chip selects are configured, one for the X18 connector and the other one for the X20 connector. Thus two spidev devices appear, for a Colibri iMX7 e.g. spidev2.0 CS signal is available on X18 ONLY, and spidev2.1 CS signal is available on X20 ONLY. Refer to the following table:

SODIMM Pin Colibri Signal Name Signal X18 pin X20 pin
86 SSPFRM CS0 3
65 CIF_D9 CS1 24
88 SSPSCLK CLK 6 23
90 SSPRXD MISO 5 21
92 SSPTXD MOSI 4 19

User-space access

SPI access from user-space is provided through the spidev driver which exports device files under /dev. See Documentation/spi/spidev in the kernel sources for more information.

The following shows a read using the sample code in the kernel sources (Documentation/spi/spidev_test.c) using spidev interface:

# spidev_test -D /dev/spidev3.0
spi mode: 0x0
bits per word: 8
max speed: 500000 Hz (500 KHz)

Kernel-space drivers

The Linux kernel already provides drivers for various SPI devices, hence before writing your own driver checking your Linux kernels configuration options and/or searching through the kernel mailing list is best practice.

If you plan to write an SPI device driver you can use the SPI MCP2515 CAN controller driver as an example. The MCP2515 CAN controller is available and connected to the Colibri SPI port on the v3 series of the Colibri Evaluation Board.

BSP 3

Overview

The Apalis standard provides two SPI interfaces compatible with all modules of the Apalis family.

MXM3 Pin Apalis Signal Name Description
225 SPI1_MOSI SPI Master Output, Slave Input; SPI Data Out (DOUT)
223 SPI1_MISO SPI Master Input, Slave Output; SPI DATA In (DIN)
227 SPI1_CS SPI Chip Select; SPI Enable Signal; SPI Slave Select
221 SPI1_CLK SPI Serial Clock; (SCK)
231 SPI2_MOSI SPI Master Output, Slave Input; SPI Data Out (DOUT)
229 SPI2_MISO SPI Master Input, Slave Output; SPI DATA In (DIN)
233 SPI2_CS SPI Chip Select; SPI Enable Signal; SPI Slave Select
235 SPI2_CLK SPI Serial Clock; (SCK)

The Colibri standard provides one SPI interface compatible with all modules of the Colibri family which historically is called Synchronous Serial Port (SSP).

SODIMM Pin Colibri Signal Name SSP Description SPI Description
86 SSPFRM Synchronous Serial Port Frame SPI Chip Select; SPI Enable Signal; SPI Slave Select
88 SSPSCLK Synchronous Serial Port Clock SPI Serial Clock; (SCK)
90 SSPRXD Synchronous Serial Port Receive SPI Master Input / Slave Output (MISO); SPI DATA In (DIN)
92 SSPTXD Synchronous Serial Port Transmit SPI Master Output / Slave Input (MOSI); SPI Data Out (DOUT)

The standard SPI interfaces are enabled by default. Most modules offer additional (non-standard) SPI interfaces, to enable these device trees or board files aka platform data customization is required.

The Colibri Evaluation Board provides an MCP2515 SPI CAN controller. For Colibri modules the kernel driver for this CAN controller is active by default and no userspace SPI access is possible, i.e. the /dev/spidevA.B device files are not available. See the carrier board section for further information.

Modules

Apalis iMX6

Toradex Name NXP/Freescale Name Device
Apalis SPI1 ECSPI1 SS0 spidev0.0
Apalis SPI2 ECSPI2 SS0 spidev1.0

Apalis iMX8

Toradex Name NXP/Freescale Name Device
Apalis SPI1 LPSPI0 spidev0.0
Apalis SPI2 LPSPI2 spidev1.0

Apalis iMX8X

Toradex Name NXP/Freescale Name Device
Apalis SPI1 LPSPI0 spidev0.0
Apalis SPI2 LPSPI2 spidev1.0

Apalis TK1

Toradex Name NVIDIA Name Device Note
Apalis SPI1 SPI1A CS0 spidev0.0
SPI2C CS1 Kinetis K20 Companion MCU
SPI2C CS2 spidev1.2 EzPort of Kinetis K20 Companion MCU
Apalis SPI2 SPI4C CS0 spidev3.0

Colibri iMX6

Toradex Name NXP/Freescale Name Device
Colibri SSP ECSPI4 SS1 spidev3.0

Colibri iMX6ULL

Toradex Name NXP/Freescale Name Device
Colibri SSP ECSPI1 SS0 spidev0.0

Colibri iMX7

Toradex Name NXP/Freescale Name Device
Colibri SSP ECSPI2 SS0 spidev2.0

Colibri iMX8X

Toradex Name NXP/Freescale Name Device
Colibri SSP LPSPI2 spidev0.0

Note: By default the above SPI interface is disabled on the Colibri i.MX8X. You'll need to modify the device tree to enable it. Fortunately, we provide pre-made overlays to enable it.

Carrier Boards

Colibri Evaluation board

By default our BSPs use the MCP2515 SPI CAN controller as available on our Colibri Evaluation board V3.x. In order to use spidev instead one needs to disable (e.g. status = "disabled") the mcp2515 device tree node and enable (e.g. status = "okay") the spidev one and re-generate and deploy the device tree to the target. The specific changes are outlined below, as an example, the device tree for a Colibri iMX7 is given:

diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 1db5aa5..28a8bc7 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -101,14 +101,14 @@
interrupt-parent = <&gpio5>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
spi-max-frequency = <10000000>;
-               status = "okay";
+               status = "disabled";
};
spidev0: spidev@0 {
compatible = "toradex,evalspi";
reg = <0>;
spi-max-frequency = <23000000>;
-               status = "disabled";
+               status = "okay";
};
};

Colibri Aster board

Aster doesn't include the mcp2515 SPI CAN controller, so spidev is enabled by default. As SPI is accessible on both X18 and X20 two chip selects are configured, one for the X18 connector and the other one for the X20 connector. Thus two spidev devices appear, for a Colibri iMX7 e.g. spidev2.0 CS signal is available on X18 ONLY, and spidev2.1 CS signal is available on X20 ONLY. Refer to the following table:

SODIMM Pin Colibri Signal Name Signal X18 pin X20 pin
86 SSPFRM CS0 3
65 CIF_D9 CS1 24
88 SSPSCLK CLK 6 23
90 SSPRXD MISO 5 21
92 SSPTXD MOSI 4 19

User-space access

SPI access from user-space is provided through the spidev driver which exports device files under /dev. See Documentation/spi/spidev in the kernel sources for more information.

The following shows a read of an ADC082S021 using the sample code in the kernel sources (Documentation/spi/spidev_test.c) using spidev interface:

# ./spidev_test -D /dev/spidevB.C
spi mode: 0
bits per word: 8
max speed: 500000 Hz (500 KHz)

02 E0 00 00 00 00 
00 00 02 E0 02 E0 
02 E0 00 00 00 00 
00 00 00 00 00 00 
00 00 00 00 00 00 
00 00 00 00 00 00 
00 00

Kernel-space drivers

The Linux kernel already provides drivers for various SPI devices, hence before writing your own driver checking your Linux kernels configuration options and/or searching through the kernel mailing list is best practice.

If you plan to write an SPI device driver you can use the SPI MCP2515 CAN controller driver as an example. The MCP2515 CAN controller is available and connected to the Colibri SPI port on the v3 series of the Colibri Evaluation Board.

BSP 2.8

Overview

The Apalis standard provides two SPI interfaces compatible with all modules of the Apalis family.

MXM3 Pin Apalis Signal Name Description
225 SPI1_MOSI SPI Master Output, Slave Input; SPI Data Out (DOUT)
223 SPI1_MISO SPI Master Input, Slave Output; SPI DATA In (DIN)
227 SPI1_CS SPI Chip Select; SPI Enable Signal; SPI Slave Select
221 SPI1_CLK SPI Serial Clock; (SCK)
231 SPI2_MOSI SPI Master Output, Slave Input; SPI Data Out (DOUT)
229 SPI2_MISO SPI Master Input, Slave Output; SPI DATA In (DIN)
233 SPI2_CS SPI Chip Select; SPI Enable Signal; SPI Slave Select
235 SPI2_CLK SPI Serial Clock; (SCK)

The Colibri standard provides one SPI interface compatible with all modules of the Colibri family which historically is called Synchronous Serial Port (SSP).

SODIMM Pin Colibri Signal Name SSP Description SPI Description
86 SSPFRM Synchronous Serial Port Frame SPI Chip Select; SPI Enable Signal; SPI Slave Select
88 SSPSCLK Synchronous Serial Port Clock SPI Serial Clock; (SCK)
90 SSPRXD Synchronous Serial Port Receive SPI Master Input / Slave Output (MISO); SPI DATA In (DIN)
92 SSPTXD Synchronous Serial Port Transmit SPI Master Output / Slave Input (MOSI); SPI Data Out (DOUT)

The standard SPI interfaces are enabled by default. Most modules offer additional (non-standard) SPI interfaces, to enable these device trees or board files aka platform data customization is required.

The Colibri Evaluation Board provides an MCP2515 SPI CAN controller. For Colibri modules the kernel driver for this CAN controller is active by default and no userspace SPI access is possible, i.e. the /dev/spidevA.B device files are not available. See the carrier board section for further information.

Modules

Apalis iMX6

Toradex Name NXP/Freescale Name Device
Apalis SPI1 ECSPI1 SS0 spidev0.0
Apalis SPI2 ECSPI2 SS0 spidev1.0

Apalis iMX8

Toradex Name NXP/Freescale Name Device
Apalis SPI1 LPSPI0 spidev0.0
Apalis SPI2 LPSPI2 spidev1.0

Apalis iMX8X

Toradex Name NXP/Freescale Name Device
Apalis SPI1 LPSPI0 spidev0.0
Apalis SPI2 LPSPI2 spidev1.0

Apalis T30

Toradex Name NVIDIA Name Device Note
Apalis SPI1 SPI1B CS0 spidev0.0
SPI2B CS0 MCP2515 for Apalis CAN1
SPI4C CS1 MCP2515 for Apalis CAN2
Apalis SPI2 SPI5A CS2 spidev4.2

Apalis TK1

Toradex Name NVIDIA Name Device Note
Apalis SPI1 SPI1A CS0 spidev0.0
SPI2C CS1 Kinetis K20 Companion MCU
SPI2C CS2 spidev1.2 EzPort of Kinetis K20 Companion MCU
Apalis SPI2 SPI4C CS0 spidev3.0

Colibri iMX6

Toradex Name NXP/Freescale Name Device
Colibri SSP ECSPI4 SS1 spidev3.0

Colibri iMX6ULL

Toradex Name NXP/Freescale Name Device
Colibri SSP ECSPI1 SS0 spidev0.0

Colibri iMX7

Toradex Name NXP/Freescale Name Device
Colibri SSP ECSPI2 SS0 spidev2.0

Colibri iMX8X

Toradex Name NXP/Freescale Name Device
Colibri SSP LPSPI2 spidev0.0

Note: By default the above SPI interface is disabled on the Colibri i.MX8X. You'll need to modify the device tree to enable it. Fortunately, we provide pre-made overlays to enable it.

Colibri T20

Toradex Name NVIDIA Name Device
Colibri SSP SPI4 CS0 spidev3.0

Colibri T30

Toradex Name NVIDIA Name Device
Colibri SSP SPI1A CS0 spidev0.0

Colibri VFxx

Toradex Name NXP/Freescale Name Device
Colibri SSP SPI1 PCS0 spidev1.0

Carrier Boards

Colibri Evaluation board

By default our BSPs use the MCP2515 SPI CAN controller as available on our Colibri Evaluation board V3.x. In order to use spidev instead one needs to disable (e.g. status = "disabled") the mcp2515 device tree node and enable (e.g. status = "okay") the spidev one and re-generate and deploy the device tree to the target. The specific changes are outlined below, as an example, the device tree for a Colibri iMX7 is given:

diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 1db5aa5..28a8bc7 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -101,14 +101,14 @@
interrupt-parent = <&gpio5>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
spi-max-frequency = <10000000>;
-               status = "okay";
+               status = "disabled";
};
spidev0: spidev@0 {
compatible = "toradex,evalspi";
reg = <0>;
spi-max-frequency = <23000000>;
-               status = "disabled";
+               status = "okay";
};
};

Colibri Aster board

Aster doesn't include the mcp2515 SPI CAN controller, so spidev is enabled by default. As SPI is accessible on both X18 and X20 two chip selects are configured, one for the X18 connector and the other one for the X20 connector. Thus two spidev devices appear, for a Colibri iMX7 e.g. spidev2.0 CS signal is available on X18 ONLY, and spidev2.1 CS signal is available on X20 ONLY. Refer to the following table:

SODIMM Pin Colibri Signal Name Signal X18 pin X20 pin
86 SSPFRM CS0 3
65 CIF_D9 CS1 24
88 SSPSCLK CLK 6 23
90 SSPRXD MISO 5 21
92 SSPTXD MOSI 4 19

User-space access

SPI access from user-space is provided through the spidev driver which exports device files under /dev. See Documentation/spi/spidev in the kernel sources for more information.

The following shows a read of an ADC082S021 using the sample code in the kernel sources (Documentation/spi/spidev_test.c) using spidev interface:

# ./spidev_test -D /dev/spidevB.C
spi mode: 0
bits per word: 8
max speed: 500000 Hz (500 KHz)

02 E0 00 00 00 00 
00 00 02 E0 02 E0 
02 E0 00 00 00 00 
00 00 00 00 00 00 
00 00 00 00 00 00 
00 00 00 00 00 00 
00 00

Kernel-space drivers

The Linux kernel already provides drivers for various SPI devices, hence before writing your own driver checking your Linux kernels configuration options and/or searching through the kernel mailing list is best practice.

If you plan to write an SPI device driver you can use the SPI MCP2515 CAN controller driver as an example. The MCP2515 CAN controller is available and connected to the Colibri SPI port on the v3 series of the Colibri Evaluation Board.

Frequency

Colibri T20

By default, the regular SPI interface is configured for 3 MHz operation. The sbc4 clock which is four times the SPI clock is configured for 12 MHz operation with pll_p as its parent. As the divider between its parent and sbc4 only supports 7.1 bits (e.g. 7 bits of mantissa and 1 bit of fraction) and pll_p runs at 216 MHz the lowest possible SPI clock in that configuration lays somewhere around 424 kHz. If a lower clock is desired one has to choose another parent clock like clk_m operating at 13 MHz. This allows SPI clocks as low as 25 kHz. In the Linux kernel sources that configuration can be found here.

As follows are some clock tree excerpts for a few use-cases:

DEFAULT spidev configuration

   clk_m                           on     11           13000000
      pll_p                        on     11  x16.6..  216000000
         sbc4                      off    0   18       12000000


MCP2515 CAN configuration

   clk_m                           on     11           13000000
      pll_p                        on     11  x16.6..  216000000
         sbc4                      off    0   5.5      39272727

=> 9.830 MHz measured at SSP_SCLK pin

   clk_m                           on     11           13000000
      pll_p                        on     11  x16.6..  216000000
         sbc4                      off    0   127.5    1694117   

=> 423.6 kHz measured at SSP_SCLK pin

   clk_m                           on     11           13000000
      sbc4                         off    0   65       200000    

=> 50 kHz measured at SSP_SCLK pin

See also

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