SPI (Linux)

Overview

The Apalis standard provides two SPI interfaces compatible with all modules of the Apalis family.

The Colibri standard provides one SPI interface compatible with all modules of the Colibri family which historically is called Synchronous Serial Port (SSP).

The Verdin standard provides one SPI interface compatible with all modules of the Verdin family.

The standard SPI interfaces are enabled by default. Most modules offer additional (non-standard) SPI interfaces, to enable these device trees or board file aka platform data customization is required.

The Colibri Evaluation Board provides an MCP2515 SPI CAN controller. For Colibri modules the kernel driver for this CAN controller is active by default and no userspace SPI access is possible, i.e. the /dev/spidevA.B device files are not available. See the carrier board section for further information.

Modules

Apalis iMX6

Apalis iMX8

Apalis iMX8X

Apalis T30

Apalis TK1

Colibri iMX6

Colibri iMX6ULL

Colibri iMX7

Colibri iMX8X

Note: By default the above SPI interface is disabled on the Colibri i.MX8X. You'll need to modify the device tree to enable it. Fortunately we provide pre-made overlays to enable it.

Colibri T20

Colibri T30

Colibri VFxx

Verdin iMX8M Mini

Verdin iMX8M Plus

Carrier Boards

Colibri Evaluation board

By default our BSPs use the MCP2515 SPI CAN controller as available on our Colibri Evaluation board V3.x. In order to use spidev instead one needs to disable (e.g. status = "disabled") the mcp2515 device tree node and enable (e.g. status = "okay") the spidev one and re-generate and deploy the device tree to the target. The specific changes are outlined below, as an example, the device tree for a Colibri iMX7 is given:

diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 1db5aa5..28a8bc7 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -101,14 +101,14 @@
interrupt-parent = <&gpio5>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
spi-max-frequency = <10000000>;
-               status = "okay";
+               status = "disabled";
};
spidev0: spidev@0 {
compatible = "toradex,evalspi";
reg = <0>;
spi-max-frequency = <23000000>;
-               status = "disabled";
+               status = "okay";
};
};

Colibri Aster board

Aster doesn't include the mcp2515 SPI CAN controller, so spidev is enabled by default. As SPI is accessible on both X18 and X20 two chip selects are configured, one for the X18 connector and the other one for the X20 connector. Thus two spidev devices appear, for a Colibri iMX7 e.g. spidev2.0 CS signal is available on X18 ONLY, and spidev2.1 CS signal is available on X20 ONLY. Refer to the following table:

User-space access

SPI access from user-space is provided through the spidev driver which exports device files under /dev. See Documentation/spi/spidev in the kernel sources for more information.

The following shows a read of an ADC082S021 using the sample code in the kernel sources (Documentation/spi/spidev_test.c) using spidev interface:

#  ./spidevtest -D /dev/spidevB.C

spi mode: 0
bits per word: 8
max speed: 500000 Hz (500 KHz)

02 E0 00 00 00 00 
00 00 02 E0 02 E0 
02 E0 00 00 00 00 
00 00 00 00 00 00 
00 00 00 00 00 00 
00 00 00 00 00 00 
00 00 

Kernel-space drivers

The Linux kernel already provides drivers for various SPI devices, hence before writing your own driver checking your Linux kernels configuration options and/or searching through the kernel mailing list is best practice.

If you plan to write an SPI device driver you can use the SPI MCP2515 CAN controller driver as an example. The MCP2515 CAN controller is available and connected to the Colibri SPI port on the v3 series of the Colibri Evaluation Board.

Frequency

Colibri T20

By default, the regular SPI interface is configured for 3 MHz operation. The sbc4 clock which is four times the SPI clock is configured for 12 MHz operation with pll_p as its parent. As the divider between its parent and sbc4 only supports 7.1 bits (e.g. 7 bits of mantissa and 1 bit of fraction) and pll_p runs at 216 MHz the lowest possible SPI clock in that configuration lays somewhere around 424 kHz. If a lower clock is desired one has to choose another parent clock like clk_m operating at 13 MHz. This allows SPI clocks as low as 25 kHz. In the Linux kernel sources that configuration can be found here.

As follows some clock tree excerpts for a few use-cases:

DEFAULT spidev configuration

   clk_m                           on     11           13000000
      pll_p                        on     11  x16.6..  216000000
         sbc4                      off    0   18       12000000


MCP2515 CAN configuration

   clk_m                           on     11           13000000
      pll_p                        on     11  x16.6..  216000000
         sbc4                      off    0   5.5      39272727

=> 9.830 MHz measured at SSP_SCLK pin

   clk_m                           on     11           13000000
      pll_p                        on     11  x16.6..  216000000
         sbc4                      off    0   127.5    1694117   

=> 423.6 kHz measured at SSP_SCLK pin

   clk_m                           on     11           13000000
      sbc4                         off    0   65       200000    

=> 50 kHz measured at SSP_SCLK pin