Pinmuxing Guide
Introduction
Pin configuration is crucial when working with a custom hardware, external peripherals and/or custom carrier board designs. Furthermore almost all peripherals need signals multiplexed to external pins in order to operate. By specifying the pin function and settings, you gain control over the physical pins. Using Linux, this is done by customizing Device trees.
To learn which interfaces, pin configurations, and settings can be used on your SoM, you can refer to the Product Datasheet and to our Pinout Designer Tool.
This article introduce a series of guides on setting up pinmux for Toradex SoMs, offering both general and specific information.
Pinmuxing Overview on Toradex SoMs
The majority of SoC pins are multiplexed and offer a range of alternate pin functions, along with configurable settings like internal pull-ups and pull-downs. This overview will walk you through the process of configuring pin functions and settings for devices within the Linux device tree. However, assigning pins to a driver works with standardized bindings. Each pinctrl subnode needs to be assigned to a driver, otherwise, the pinctrl won't apply the settings on its own. How and how many pinctrl groups can be assigned to a device depends on the device driver used. Most drivers are documented in the kernel source under Documentation/devicetree/bindings/. The default assignment can be made using pinctrl-n or pinctrl-names properties.
Setting Up the Pinmux for a Device
Device Tree Overlays provide a straightforward way to modify Device Trees, which vary between Toradex SoMs. Below, you can find two examples of how to write an overlay to multiplex pin functions:
-
NXP i.MX Based Modules: Case Oriented Example: LED Blink
-
TI AM6x Based Modules: Case Oriented Example: Enabling a GPIO Pin
For additional information on Device Tree Overlays, refer to the following articles:
Pin Configuration Files
The device tree bindings directory contains a pin configuration file for each System-on-Chip (SoC), which includes pin function macro definitions and relevant documentation. For a deeper understanding of the pin function macro values, refer to documentation specific to the SoC in question. The pin header files can be found in the paths specified on the table, while the corresponding documentation is located in Documentation/devicetree/bindings/pinctrl/.
| Related Toradex SoM | Header File | Pin Control Documentation |
|---|---|---|
| Colibri iMX6 | arch/arm/boot/dts/imx6dl-pinfunc.h | fsl,imx6dl-pinctrl.txt |
| Apalis iMX6 | arch/arm/boot/dts/imx6q-pinfunc.h | fsl,imx6q-pinctrl.txt |
| Colibri iMX6ULL | arch/arm/boot/dts/imx6ull-pinfunc.harch/arm/boot/dts/imx6ull-pinfunc-lpsr.harch/arm/boot/dts/imx6ul-pinfunc.h | fsl,imx6ul-pinctrl.txt |
| Colibri iMX7 | arch/arm/boot/dts/imx7d-pinfunc.harch/arm/boot/dts/imx7d-pinfunc-lpsr.h | fsl,imx7d-pinctrl.txt |
| Apalis iMX8 | include/dt-bindings/pinctrl/pads-imx8qm.h | fsl,scu-pinctrl.yaml |
| Colibri iMX8X | include/dt-bindings/pinctrl/pads-imx8qxp.h include/dt-bindings/pinctrl/pads-imx8dxl.h | fsl,scu-pinctrl.yaml |
| Verdin iMX8M Mini | arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | fsl,imx8mm-pinctrl.txt |
| Verdin iMX8M Plus | arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h | fsl,imx8mp-pinctrl.yaml |
| Verdin AM6x | arch/arm64/boot/dts/ti/k3-pinctrl.h | pinctrl-single.yaml |
Next Steps
Toradex offers a set of articles with specific content about how to leverage pinmuxing on the Toradex System on Modules: