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Pinmuxing i.MX 8M Mini/Plus Based Modules

Introduction​

This article aims to give you a comprehensive understanding of pinmuxing on i.MX 8M Mini/Plus based modules. You will be equipped with the knowledge necessary to configure pins effectively, leveraging the specifics on how to change and assign functions to i.MX 8M Mini/Plus SoC pins that suits to your hardware design, diving into the intricacies of the IOMUXC and discuss how to configure pins effectively using device tree nodes and the fsl,pins property.

Why Pinmuxing​

Pin configuration is a critical aspect to guarantee that your custom hardware behaves as expected, assigning specific functions to the right pins. Powered by NXP's i.MX 8M Mini and i.MX 8M Plus system-on-chips (SoCs), these modules offer a powerful Input/Output Multiplexer Controller (IOMUXC) that enables pin multiplexing and flexible pin configurations, including drive strength.

Prerequisites​

  • Toradex with i.MX 8M Mini/Plus based SoC: Verdin iMX8MM or Verdin iMX8MP

Pinmuxing Details​

To configure a pin on i.MX 8M Mini/Plus based modules, a device tree node must be defined inside the pin controller node, with the property fsl,pins with the specific definitions found in imx8mm-pinfunc.h, imx8mp-pinfunc.h and the related Application Processor Reference Manual.

NXP i.MX 8M Mini Based Modules​

To configure a pin, a device tree node is required inside the pin controller node with the property fsl,pins. Six integers must be assigned to the property for each pin, with the first five usually given by preprocessor definitions found at imx8mm-pinfunc.h. These #define statements specify the desired function for a given SoC pin. For instance, in the example below, a GPIO pin can be muxed from GPIO1_IO06 to GPIO1_IO06.

/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
&iomuxc {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_gpio1>, <&pinctrl_gpio2>, ...

    pinctrl_can1_int: can1intgrp {
        fsl,pins =
            <MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6      0x146>; /* CAN_1_SPI_INT#_1.8V */
    };

For a detailed description and table of possible pin-settings, look them up in the i.MX 8M Mini Applications Processor Reference Manual. The possible muxings can be found in chapter 4 of the datasheet or with our Pinout Designer pinout.torizon.io.

NXP i.MX 8M Plus Based Modules​

To configure a pin, a device tree node is required inside the pin controller node with the property fsl,pins. Six integers must be assigned to the property for each pin, with the first five usually given by preprocessor definitions found at imx8mp-pinfunc.h. These #define statements specify the desired function for a given SoC pin. For instance, in the example below, ECSPI2_MISO is muxed to UART4_DCE_CTS.

/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
&iomuxc {
    pinctrl_bt_uart: btuartgrp {
        fsl,pins =
            <MX8MP_IOMUXC_ECSPI2_MISO__UART4_DCE_CTS    0x1c4>,
            ...
    };

For a detailed description and table of possible pin-settings, look them up in the i.MX 8M Plus Applications Processor Reference Manual. The possible muxings can be found in chapter 4 of the datasheet or with our Pinout Designer pinout.torizon.io.



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