Tegra 30 Product Change Notification Guide

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Introduction

The version without the level shifter for the Apalis T30 (V1.1Z) / Colibris T30 (V1.1X) loses the camera input functionality. With that, modules using Toradex Linux BSP will have the affected pins left floating after the system boot. This article helps to enable the pull-down on those pins.

Affected Products

Apalis new designs are shown below:

End of life Product	Part Number	New Product (with limited features to increase availability, group EOL still applies)	New Part Number
Apalis T30 2GB V1.1B	00251101	Apalis T30 2GB V1.1Z	00251125
Apalis T30 1GB V1.1B	00261101	Apalis T30 1GB V1.1Z	00261125
Apalis T30 1GB IT V1.1B	00311101	Apalis T30 1GB IT V1.1Z	00311125

Description of Changes

Removed TI 74AVCA164245ZQLR (level shifter) and related components due to component EOL and shortage. This component is related to the parallel camera interface.

Customers not requiring the parallel camera input are strongly encouraged to use the additional substitution version. Toradex also advises customers to validate the new product version before their production release, we can provide a rework instruction of the additional substitution version.

Hardware Impact

The parallel camera interface (Apalis VI_XX pins) won’t be available in the new V1.1Z version.

No changes are required on the Apalis carrier board.

If the listed Apalis pins are being used as general GPIOs, they keep their functionality as they are in parallel connected to a second pin of the SoC.

Apalis T30 Level Shifter Removal

Without the level shifter being assembled, the following Tegra pins are floating. (For more details please refer to Figure 5 and Table 5-54 in Apalis T30 datasheet).

X1 Pin#	Tegra Pin 1 (Removed)	Tegra pin 2
99	VI_D11	KB_COL5
123	VI_D10	KB_COL6
135	VI_D0	KB_ROW8
159	VI_D1	KB_ROW9
173	VI_D9	KB_ROW7
175	VI_D8	KB_ROW6
177	VI_D7	KB_ROW5
179	VI_D6	KB_ROW4
181	VI_D5	KB_ROW3
183	VI_D4	KB_ROW2
185	VI_D3	KB_ROW1
187	VI_D2	KB_ROW0
191	VI_PCKL	KB_COL2
195	VI_VSYNC	KB_COL3
197	VI_HSYNC	KB_COL4

Software Impact

We request customers check their software in detail to guarantee functionality on the new product version. Please check that no excessive warning or error logging is done in the background which might compromise system performance or flash storage lifetime.

Toradex Linux BSP

After boot, If not handled properly, the affected Tegra pins listed above will be left floating as a direct consequence of removing the TI 74AVCA164245ZQLR level shifter. Thus, Toradex strongly recommends enabling the pull-down resistor on these Tegra pins to avoid pin fluctuation.

This can be achieved with the following linux kernel patch:

0001-apalis_t30-pinmux-Set-all-VI-pins-to-PULL_DOWN.patch

diff --git a/arch/arm/mach-tegra/board-apalis_t30-pinmux.c b/arch/arm/mach-tegra/board-apalis_t30-pinmux.c
index ae5e82f..0091dae 100644
--- a/arch/arm/mach-tegra/board-apalis_t30-pinmux.c
+++ b/arch/arm/mach-tegra/board-apalis_t30-pinmux.c
@@ -449,23 +449,23 @@ static __initdata struct tegra_pingroup_config apalis_t30_pinmux[] = {
    DEFAULT_PINMUX(ULPI_STP, UARTD, NORMAL, NORMAL, INPUT),
 
    /* VI pins are all level-shifted */
-   VI_PINMUX(VI_D0, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D1, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D2, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D3, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D4, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D5, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D6, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D7, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D8, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D9, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D10, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D11, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_HSYNC, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D0, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D1, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D2, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D3, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D4, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D5, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D6, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D7, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D8, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D9, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D10, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D11, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_HSYNC, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
    /* GPIO T1: VI_LevelShifter_DIR */
    DEFAULT_PINMUX(VI_MCLK, VI, NORMAL, NORMAL, OUTPUT),
-   VI_PINMUX(VI_PCLK, VI, PULL_UP, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_VSYNC, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_PCLK, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_VSYNC, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
 };
#description: 
#sidebar_label: 
sidebar_position: 180
keywords: 
  - Toradex Capacitive Touch Adapter
  - Embedded Linux Hardware
  - Apalis and Colibri Modules
  - Connect Capacitive Touch Display to Carrier Board
  - Toradex Carrier Board Compatibility
---

import TabItem from '@theme/TabItem';
import Tabs from '@theme/Tabs'

# Tegra 30 Product Change Notification Guide

## Introduction

The version without the level shifter for the Apalis T30 (V1.1Z) / Colibris T30 (V1.1X) loses the camera input functionality. With that, modules using Toradex Linux BSP will have the affected pins left floating after the system boot. This article helps to enable the pull-down on those pins.


<Tabs defaultValue="apalis" values={[{label: 'Apalis T30', value: 'apalis'},{label: 'Colibri T30', value: 'colibri'}]}>

<TabItem value="apalis">

## Affected Products

Apalis new designs are shown below:

| End of life Product     | Part Number | New Product (with limited features to increase availability, group EOL still applies) | New Part Number |
|-------------------------|-------------|-------------------------------------------------------------------------------------|-----------------|
| Apalis T30 2GB V1.1B    | 00251101    | Apalis T30 2GB V1.1Z                                                                | 00251125        | 
| Apalis T30 1GB V1.1B    | 00261101    | Apalis T30 1GB V1.1Z                                                                | 00261125        | 
| Apalis T30 1GB IT V1.1B | 00311101    | Apalis T30 1GB IT V1.1Z                                                             | 00311125        |

## Description of Changes

Removed **TI 74AVCA164245ZQLR** (level shifter) and related components due to component EOL and shortage. This component is related to the parallel camera interface.

Customers not requiring the parallel camera input are strongly encouraged to use the additional substitution version. Toradex also advises customers to validate the new product version before their production release, we can provide a rework instruction of the additional substitution version.

## Hardware Impact

The parallel camera interface (Apalis VI_XX pins) won’t be available in the new V1.1Z version. 

No changes are required on the Apalis carrier board. 

If the listed Apalis pins are being used as general GPIOs, they keep their functionality as they are in parallel connected to a second pin of the SoC.

![Apalis T30 Level Shifter Removal](https://docs.toradex.com/112663-apalis-t30-pin-removal.png)

Without the level shifter being assembled, the following Tegra pins are floating.
(For more details please refer to Figure 5 and Table 5-54 in [Apalis T30 datasheet](/hardware/apalis-som-family/modules/apalis-t30/#datasheets)).

| X1 Pin# | Tegra Pin 1 (Removed) | Tegra pin 2 |
| --- | --- | --- |
| 99 | VI_D11 | KB_COL5 |
| 123 | VI_D10 | KB_COL6 |
| 135 | VI_D0 | KB_ROW8 |
| 159 | VI_D1 | KB_ROW9 |
| 173 | VI_D9 | KB_ROW7 |
| 175 | VI_D8 | KB_ROW6 |
| 177 | VI_D7 | KB_ROW5 |
| 179 | VI_D6 | KB_ROW4 |
| 181 | VI_D5 | KB_ROW3 |
| 183 | VI_D4 | KB_ROW2 |
| 185 | VI_D3 | KB_ROW1 |
| 187 | VI_D2 | KB_ROW0 |
| 191 | VI_PCKL | KB_COL2 |
| 195 | VI_VSYNC | KB_COL3 |
| 197 | VI_HSYNC | KB_COL4 |

## Software Impact

We request customers check their software in detail to guarantee functionality on the new product version. Please check that no excessive warning or error logging is done in the background which might compromise system performance or flash storage lifetime.

### Toradex Linux BSP

After boot, If not handled properly, the affected Tegra pins listed above will be left floating as a direct consequence of removing the **TI 74AVCA164245ZQLR** level shifter. Thus, Toradex strongly recommends enabling the pull-down resistor on these Tegra pins to avoid pin fluctuation.

This can be achieved with the following linux kernel patch:

**0001-apalis_t30-pinmux-Set-all-VI-pins-to-PULL_DOWN.patch**

```diff
diff --git a/arch/arm/mach-tegra/board-apalis_t30-pinmux.c b/arch/arm/mach-tegra/board-apalis_t30-pinmux.c
index ae5e82f..0091dae 100644
--- a/arch/arm/mach-tegra/board-apalis_t30-pinmux.c
+++ b/arch/arm/mach-tegra/board-apalis_t30-pinmux.c
@@ -449,23 +449,23 @@ static __initdata struct tegra_pingroup_config apalis_t30_pinmux[] = {
    DEFAULT_PINMUX(ULPI_STP, UARTD, NORMAL, NORMAL, INPUT),
 
    /* VI pins are all level-shifted */
-   VI_PINMUX(VI_D0, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D1, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D2, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D3, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D4, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D5, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D6, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D7, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D8, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D9, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D10, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D11, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_HSYNC, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D0, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D1, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D2, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D3, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D4, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D5, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D6, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D7, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D8, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D9, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D10, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D11, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_HSYNC, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
    /* GPIO T1: VI_LevelShifter_DIR */
    DEFAULT_PINMUX(VI_MCLK, VI, NORMAL, NORMAL, OUTPUT),
-   VI_PINMUX(VI_PCLK, VI, PULL_UP, NORMAL, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_VSYNC, VI, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_PCLK, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_VSYNC, VI, PULL_DOWN, NORMAL, INPUT, DISABLE, DISABLE),
 };
 
 #define GPIO_INIT_PIN_MODE(_gpio, _is_input, _value)   \

To add this patch with Yocto BSP 2.8, make sure to follow these steps:

Make sure your environment is configured and ready. Follow the Build a Reference Image with Yocto Project/OpenEmbedded for more details.
Create a new custom layer to customize the kernel. Follow the Custom meta layers, recipes and images in Yocto Project (hello-world examples) for more details.
Add a new bbappend file called linux-toradex_%.bbappend with the following content:

FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"

SRC_URI += "\ 
    file://0001-apalis_t30-pinmux-Set-all-VI-pins-to-PULL_DOWN.patch \
    "

Make sure you have the 0001-apalis_t30-pinmux-Set-all-VI-pins-to-PULL_DOWN.patch in your linux-toradex folder. The final structure should look like this:

.
├── conf
│  └── layer.conf
├── COPYING.MIT
├── README
└── recipes-kernel
   └── linux
      ├── linux-toradex
      │  ├── 0001-apalis_t30-pinmux-Set-all-VI-pins-to-PULL_DOWN.patch
      └── linux-toradex_%.bbappend

Add your new layer and bitbake your new image.

$ bitbake-layers add-layer ../layers/<custom-meta-layer>
$ bitbake <image>

Windows CE

The removal of the TI 74AVCA164245ZQLR does not impact the functionality of the software no errors are displayed. All the pins are left on pull-down unless the camera interface is used.

Affected Products

Colibri's new designs are shown below:

End of life Product	Part Number	New Product (with limited features to increase availability, group EOL still applies)	New Part Number
Colibri T30 1GB V1.1G	00231106	Colibri T30 1GB V1.1X	00231123
Colibri T30 1GB IT V1.1B	00301101	Colibri T30 1GB IT V1.1X	00301123

Description of Changes

Removed TI 74AVCA164245ZQLR (level shifter) and related components due to component EOL and shortage.

Hardware Impact

The parallel camera interface won’t be available in the new V1.1X version.

No changes are required on the Colibri carrier board.

If the listed Colibri pins are being used as general GPIOs, they keep their functionality as they are in parallel connected to a second pin of the SoC.

Colibri T30 Level Shifter Removal

Without the level shifter being assembled, the following Tegra pins are floating. (For more details please refer to Table 5-18 and Table 4-1 in Colibri T30 datasheet).

X1 Pin#	Tegra pin 2 (Removed)	Tegra Pin 1
59	VI_D7	SDMMC3_DAT3
65	VI_D9	PEX_L1_CLKREQ_N
67	VI_D6	SDMMC3_CMD
69	VI_D10	PEX_L1_RST_N
71	VI_D0	GPIO_PV2
77	VI_D11	GPIO_PCC2
79	VI_D4	SDMMC1_DAT2
81	VI_VSYNC	LCD_PWR1
85	VI_D8	GPIO_PV3
94	VI_HSYNC	PEX_L2_CLKREQ_N
96	VI_PCLK	SDMMC1_CLK
97	VI_D5	SDMMC1_DAT3
98	VI_D1	SDMMC1_CMD
101	VI_D2	SDMMC1_DAT0
103	VI_D3	SDMMC1_DAT1

Software Impact

Toradex Linux BSP

This can be achieved with the following linux kernel patch:

0001-colibri_t30-pinmux-Set-all-VI-pins-to-PULL_DOWN.patch

diff --git a/arch/arm/mach-tegra/board-colibri_t30-pinmux.c b/arch/arm/mach-tegra/board-colibri_t30-pinmux.c
index 1dac029..c5bb3a6 100644
--- a/arch/arm/mach-tegra/board-colibri_t30-pinmux.c
+++ b/arch/arm/mach-tegra/board-colibri_t30-pinmux.c
@@ -599,23 +599,23 @@ static __initdata struct tegra_pingroup_config colibri_t30_pinmux[] = {
 
 //VI pins are all input level-shifted and multiplexed
 //unused VI pins could disable input drivers
-   VI_PINMUX(VI_D0, VI, NORMAL, TRISTATE, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D1, VI, NORMAL, TRISTATE, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D2, VI, NORMAL, TRISTATE, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D3, VI, NORMAL, TRISTATE, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D4, VI, NORMAL, TRISTATE, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D5, VI, NORMAL, TRISTATE, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D6, VI, NORMAL, TRISTATE, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D7, VI, NORMAL, TRISTATE, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D8, VI, NORMAL, TRISTATE, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D9, VI, NORMAL, TRISTATE, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D10, VI, NORMAL, TRISTATE, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_D11, VI, NORMAL, TRISTATE, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_HSYNC, VI, NORMAL, TRISTATE, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D0, VI, PULL_DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D1, VI, PULL_DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D2, VI, PULL_DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D3, VI, PULL_DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D4, VI, PULL_DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D5, VI, PULL_DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D6, VI, PULL_DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D7, VI, PULL_DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D8, VI, PULL_DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D9, VI, PULL_DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D10, VI, PULL_DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_D11, VI, PULL_DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_HSYNC, VI, PULL_DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
 //GPIO T1: EN_MIC_GND
    DEFAULT_PINMUX(VI_MCLK, VI, NORMAL, NORMAL, OUTPUT),
-   VI_PINMUX(VI_PCLK, VI, PULL_UP, TRISTATE, INPUT, DISABLE, DISABLE),
-   VI_PINMUX(VI_VSYNC, VI, NORMAL, TRISTATE, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_PCLK, VI, PULL_DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
+   VI_PINMUX(VI_VSYNC, VI, PULL_DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
 };
 
 #define GPIO_INIT_PIN_MODE(_gpio, _is_input, _value)   \

To add this patch with Yocto BSP 2.8, make sure to follow these steps:

Make sure your environment is configured and ready. Follow the Build a Reference Image with Yocto Project/OpenEmbedded for more details.
Create a new custom layer to customize the kernel. Follow the Custom meta layers, recipes and images in Yocto Project (hello-world examples) for more details.
Add a new bbappend file called linux-toradex_%.bbappend with the following content:

FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"

SRC_URI += "\ 
    file://0001-colibri_t30-pinmux-Set-all-VI-pins-to-PULL_DOWN.patch \
    "

Make sure you have the 0001-colibri_t30-pinmux-Set-all-VI-pins-to-PULL_DOWN.patch in your linux-toradex folder. The final structure should look like this:

.
├── conf
│  └── layer.conf
├── COPYING.MIT
├── README
└── recipes-kernel
   └── linux
      ├── linux-toradex
      │  ├── 0001-colibri_t30-pinmux-Set-all-VI-pins-to-PULL_DOWN.patch 
      └── linux-toradex_%.bbappend

Add your new layer and bitbake your new image.

$ bitbake-layers add-layer ../layers/<custom-meta-layer>
$ bitbake <image>

Windows CE

The removal of the TI 74AVCA164245ZQLR does not impact the functionality of the software no errors are displayed. All the pins are left on pull-down unless the camera interface is used.

Contact

Please feel free to contact Toradex if you have any questions.

For commercial and sales questions, please contact shop@toradex.com.

For technical questions, please contact support@toradex.com or post a question at our community forum.

Introduction​

Affected Products​

Description of Changes​

Hardware Impact​

Software Impact​

Toradex Linux BSP​

Windows CE​

Affected Products​

Description of Changes​

Hardware Impact​

Software Impact​

Toradex Linux BSP​

Windows CE​

Contact​

Introduction

Affected Products

Description of Changes

Hardware Impact

Software Impact

Toradex Linux BSP

Windows CE

Affected Products

Description of Changes

Hardware Impact

Software Impact

Toradex Linux BSP

Windows CE

Contact