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| enum | tegraIrqNumbers {
TEG_IRQ_SGI0 = 0, TEG_IRQ_SGI1, TEG_IRQ_SGI2, TEG_IRQ_SGI3,
TEG_IRQ_SGI4, TEG_IRQ_SGI5, TEG_IRQ_SGI6, TEG_IRQ_SGI7,
TEG_IRQ_SGI8 = 8, TEG_IRQ_SGI9, TEG_IRQ_SGI10, TEG_IRQ_SGI11,
TEG_IRQ_SGI12, TEG_IRQ_SGI13, TEG_IRQ_SGI14, TEG_IRQ_SGI15,
TEG_IRQ_GLOBAL_TIMER = 27, TEG_IRQ_LEGACY_FIQ = 28, TEG_IRQ_PRIVATE_TIMER = 29, TEG_IRQ_WATCHDOG_TIMERS = 30,
TEG_IRQ_LEGACY_IRQ = 31, TEG_IRQ_TMR1 = 32, TEG_IRQ_TMR2, TEG_IRQ_RTC,
TEG_IRQ_I2S2, TEG_IRQ_SHR_SEM_INBOX_FULL, TEG_IRQ_SHR_SEM_INBOX_EMPTY, TEG_IRQ_SHR_SEM_OUTBOX_FULL,
TEG_IRQ_SHR_SEM_OUTBOX_EMPTY, TEG_IRQ_VDE_UCQ = 40, TEG_IRQ_VDE_SYNC_TOKEN, TEG_IRQ_VDE_BSEV,
TEG_IRQ_VDE_BSEA, TEG_IRQ_VDE_SXE, TEG_IRQ_I2S1, TEG_IRQ_SDMMC1,
TEG_IRQ_SDMMC2, TEG_IRQ_XIO = 48, TEG_IRQ_VDE, TEG_IRQ_AVP_UCQ,
TEG_IRQ_SDMMC3, TEG_IRQ_USB, TEG_IRQ_USB2, TEG_IRQ_SDMMC4_DUCPLICATE1,
TEG_IRQ_EIDE, TEG_IRQ_NANDCTRL = 56, TEG_IRQ_VCP, TEG_IRQ_APB_DMA_CPU,
TEG_IRQ_AHB_DMA_CPU, TEG_IRQ_ARB_SEM_GNT_CO, TEG_IRQ_ARB_SEM_GNT_CP, TEG_IRQ_OWR,
TEG_IRQ_SDMMC4_DUPLICATE2, TEG_IRQ_GPIO1 = 64, TEG_IRQ_GPIO2, TEG_IRQ_GPIO3,
TEG_IRQ_GPIO4, TEG_IRQ_UART1, TEG_IRQ_UART2, TEG_IRQ_I2C,
TEG_IRQ_SPI, TEG_IRQ_TWC = 72, TEG_IRQ_TMR3, TEG_IRQ_TMR4,
TEG_IRQ_FLOW_RSM_CPU, TEG_IRQ_FLOW_RSM_COP, TEG_IRQ_SPDIF, TEG_IRQ_UART3,
TEG_IRQ_MIPI_HS, TEG_IRQ_EVENT_GPIO_A = 80, TEG_IRQ_EVENT_GPIO_B, TEG_IRQ_EVENT_GPIO_C,
TEG_IRQ_EVENT_GPIO_D, TEG_IRQ_VFIR, TEG_IRQ_I2C5, TEG_IRQ_STAT_MON,
TEG_IRQ_GPIO5, TEG_IRQ_CPU0_PMU_INTR = 88, TEG_IRQ_CPU1_PMU_INTR, TEG_IRQ_NONE,
TEG_IRQ_SBC1, TEG_IRQ_APB_DMA_COP, TEG_IRQ_AHB_DMA_COP, TEG_IRQ_DMA_TX,
TEG_IRQ_DMA_RX, TEG_IRQ_HOST1X_SYNCPT_COP = 96, TEG_IRQ_HOST1X_SYNCPT_CPU, TEG_IRQ_HOST1X_GEN_COP,
TEG_IRQ_HOST1X_GEN_CPU, TEG_IRQ_MPE, TEG_IRQ_VI, TEG_IRQ_EPP,
TEG_IRQ_ISP, TEG_IRQ_GR2D = 104, TEG_IRQ_DISPLAY, TEG_IRQ_DISPLAYB,
TEG_IRQ_HDMI, TEG_IRQ_TVO, TEG_IRQ_MC, TEG_IRQ_EMC,
TEG_IRQ_NONE2, TEG_IRQ_NOR_FLASH = 112, TEG_IRQ_AC97, TEG_IRQ_SBC2,
TEG_IRQ_SBC3, TEG_IRQ_I2C2, TEG_IRQ_KBC, TEG_IRQ_PMU_EXT,
TEG_IRQ_GPIO6, TEG_IRQ_TVDAC = 120, TEG_IRQ_GPIO7, TEG_IRQ_UART4,
TEG_IRQ_UART5, TEG_IRQ_I2C3, TEG_IRQ_SBC4, TEG_IRQ_NONE3,
TEG_IRQ_SW_INTR, TEG_IRQ_SNOR = 128, TEG_IRQ_USB3, TEG_IRQ_PCIE_INT,
TEG_IRQ_PCIE_MSI, TEG_IRQ_PCIE_WAKE, TEG_IRQ_NONE4, TEG_IRQ_NONE5,
TEG_IRQ_NONE6, TEG_IRQ_APB_DMA_CH0 = 136, TEG_IRQ_APB_DMA_CH1, TEG_IRQ_APB_DMA_CH2,
TEG_IRQ_APB_DMA_CH3, TEG_IRQ_APB_DMA_CH4, TEG_IRQ_APB_DMA_CH5, TEG_IRQ_APB_DMA_CH6,
TEG_IRQ_APB_DMA_CH7, TEG_IRQ_APB_DMA_CH8 = 144, TEG_IRQ_APB_DMA_CH9, TEG_IRQ_APB_DMA_CH10,
TEG_IRQ_APB_DMA_CH11, TEG_IRQ_APB_DMA_CH12, TEG_IRQ_APB_DMA_CH13, TEG_IRQ_APB_DMA_CH14,
TEG_IRQ_APB_DMA_CH15, TEG_IRQ_I2C4 = 152, TEG_IRQ_NONE8, TEG_IRQ_NONE9,
TEG_IRQ_NONE10, TEG_IRQ_NONE11, TEG_IRQ_NONE12, TEG_IRQ_NONE13,
TEG_IRQ_NONE14
} |
| | Tegra IRQ numbers. More... |
| |
|
| HANDLE | LoadIntChainHandlerCompat (LPCWSTR lpFilename, LPCWSTR lpszFunctionName, BYTE bIRQ) |
| |
| BOOL | FreeIntChainHandlerCompat (HANDLE hInstance) |
| |
| BOOL | InterruptInitializeCompat (DWORD idInt, HANDLE hEvent, LPVOID pvData, DWORD cbData) |
| |
| void | InterruptDisableCompat (DWORD idInt) |
| |
| void | InterruptDoneCompat (DWORD idInt) |
| |
| LPVOID | CreateStaticMappingCompat (DWORD dwPhysBase, DWORD dwSize) |
| |
| BOOL | KernelLibIoControlCompat (HANDLE hModule, DWORD dwIoControlCode, LPVOID lpInBuf, DWORD nInBufSize, LPVOID lpOutBuf, DWORD nOutBufSize, LPDWORD lpBytesReturned) |
| |
| DWORD | GetGPIOIrq (DWORD dwGpio) |
| |
| BOOL | SetGPIOIrqEdge (DWORD dwGpio, DWORD dwEdge) |
| |
| DWORD | RequestSysInterrupt (DWORD dwIrq) |
| |
| BOOL | ReleaseSysIntr (DWORD dwSysIntr) |
| |
| void | INTGetLibVersion (DWORD *pVerMaj, DWORD *pVerMin, DWORD *pBuild) |
| |
Header file for the Interrupt Library.
- Copyright
- Copyright (c) 2013 Toradex AG
- Author
- andy.kiser
- Rev
- 2863
- Date
- 2015-06-26 17:18:52 +0200 (Fr, 26 Jun 2015)
- Target Platforms:
- PXAxxx, Txx